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参数资料
| 型号： | M48T86MH1E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| 封装： | 0.330 INCH, ROHS COMPLIANT, PLASTIC, SOH-28 |
| 文件页数： | 2/36页 |
| 文件大小： | 352K |
| 代理商： | M48T86MH1E |
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Obsolete
Product(s)
- Obsolete
Product(s)
Operation
M48T86
2.1.5
MOT (mode select)
The MOT pin offers the flexibility to choose between two bus types (see Figure 7 on
or left disconnected, Intel bus timing is selected. The pin has an internal pull-down
resistance of approximately 20 K
Ω.
2.1.6
DS (data strobe input)
The DS pin is also referred to as READ (RD). A falling edge transition on the Data Strobe
(DS) input enables the output during a a READ cycle. This is very similar to an Output
Enable (G) signal on other memory devices.
2.1.7
E (chip enable input)
The chip enable pin must be asserted low for a bus cycle in the M48T86 to be accessed.
Bus cycles which take place without asserting E will latch the addresses present, but no
data access will occur.
2.1.8
IRQ (interrupt request output)
The IRQ pin is an open drain output that can be used as an interrupt input to a processor.
The IRQ output remains low as long as the status bit causing the interrupt is present and the
corresponding interrupt-enable bit is set. IRQ returns to a high impedance state whenever
Register C is read. The RST pin can also be used to clear pending interrupts. The IRQ bus
is an open drain output so it requires an external pull-up resistor to VCC.
2.1.9
RST (reset input)
The M48T86 is reset when the RST input is pulled low. With a valid VCC applied and a low
on RST, the following events occur:
1.
Periodic Interrupt Enable (PIE) bit is cleared to a zero (Register B; Bit 6);
2.
Alarm Interrupt Enable (AIE) bit is cleared to a zero (Register B; Bit 5);
3.
Update Ended Interrupt Request (UF) bit is cleared to a zero (Register C; Bit 4);
4.
Interrupt Request (IRQF) bit is cleared to a zero (Register C Bit 7);
5.
Periodic Interrupt Flag (PF) bit is cleared to a zero (Register C; Bit 6);
6.
The device is not accessible until RST is returned high;
7.
Alarm Interrupt Flag (AF) bit is cleared to a zero (Register C; Bit 5);
8.
The IRQ pin is in the high impedance state
9.
Square Wave Output Enable (SQWE) bit is cleared to zero (Register B; Bit 3); and
10. Update Ended Interrupt Enable (UIE) is cleared to a zero (Register B; Bit 4).
2.1.10
RCL (RAM clear)
The RCL pin is used to clear all 114 storage bytes, excluding clock and control registers, of
the array to FF(hex) value. The array will be cleared when the RCL pin is held low for at least
100 ms with the oscillator running. Usage of this pin does not affect battery load. This
function is applicable only when VCC is applied.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T86MH1F | 功能描述:实时时钟 5 Volt PC Drop-In RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T86MH1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0 V PC real-time clock |
| M48T86PC | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V PC REAL TIME CLOCK |
| M48T86PC1 | 功能描述:实时时钟 5 Volt PC Drop-In RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T86PC1 | 制造商:STMicroelectronics 功能描述:IC - Real Time Clock |
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