参数资料
型号: M52277EVB
厂商: Freescale Semiconductor
文件页数: 15/46页
文件大小: 0K
描述: BOARD DEMO FOR MCF5227
标准包装: 1
系列: ColdFire®
类型: MCU
适用于相关产品: MCF52277
所含物品:
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8
Electrical Characteristics
Freescale Semiconductor
22
NOTE
The processor drives the data lines during the first clock cycle of the transfer with the full
32-bit address. This may be ignored by standard connected devices using non-multiplexed
address and data buses. However, some applications may find this feature beneficial.
The address and data busses are muxed between the FlexBus and SDRAM controller. At
the end of the read and write bus cycles the address signals are indeterminate.
Figure 9. FlexBus Read Timing
FB4
Data Input Setup
tDVFBCH
3.5
ns
FB5
Data Input Hold
tDIFBCH
0—
ns
FB6
Transfer Acknowledge (TA) Input Setup
tCVFBCH
4—
ns
FB7
Transfer Acknowledge (TA) Input Hold
tCIFBCH
0—
ns
1 Timing for chip selects only applies to the FB_CS[5:0] signals. Please see Section 5.7.2.2, “DDR SDRAM AC Timing
Specifications,for SD_CS[3:0] timing.
2 The FlexBus supports programming an extension of the address hold. Please consult the device reference manual for more
information.
Table 13. FlexBus AC Timing Specifications (continued)
Num
Characteristic
Symbol
Min
Max
Unit
Notes
FB_CLK
FB_R/W
S0
S1
S2
S3
FB_TS
FB_A[23:0]
FB_D[31:X]
FB_CSn, FB_OE,
FB_BE/BWEn
FB_TA
DATA
ADDR[31:X]
ADDR[23:0]
FB3
FB1
FB2
FB5
FB4
FB7
FB6
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