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| 型号： | M52277EVB |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 9/46页 |
| 文件大小： | 0K |
| 描述： | BOARD DEMO FOR MCF5227 |
| 标准包装： | 1 |
| 系列： | ColdFire® |
| 类型： | MCU |
| 适用于相关产品： | MCF52277 |
| 所含物品： | 板 |
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Electrical Characteristics
MCF5227x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
17
5.2
Thermal Characteristics
The average chip-junction temperature (TJ) in °C can be obtained from:
Eqn. 1
Where:
TA
= Ambient Temperature,
°C
QJMA
= Package Thermal Resistance, Junction-to-Ambient,
°C/W
PD
=PINT + PI/O
PINT
=IDD × IVDD, Watts - Chip Internal Power
PI/O
= Power Dissipation on Input and Output Pins — User Determined
For most applications PI/O < PINT and can be ignored. An approximate relationship between PD and TJ (if PI/O is neglected) is:
Eqn. 2
Solving equations 1 and 2 for K gives:
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring PD (at equilibrium)
for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively
for any value of TA.
Table 8. Thermal Characteristics
Characteristic
Symbol
196
MAPBGA
176
LQFP
Unit
Junction to ambient, natural convection
Four layer board (2s2p)
θ
JA
381,2
1
θ
JA, θJMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.
Freescale recommends the use of
θ
JmA and power dissipation specifications in the system design to prevent device
junction temperatures from exceeding the rated specification. System designers should be aware that device
junction temperatures can be significantly influenced by board layout and surrounding devices. Conformance to the
device junction temperature specification can be verified by physical measurement in the customer’s system using
the
Ψ
jt parameter, the device power dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-6 with the board horizontal.
°C/W
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
θ
JMA
341,2
°C/W
Junction to board
θ
JB
273
3 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
373
°C/W
Junction to case
θ
JC
174
4 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL
SPEC-883 Method 1012.1).
144
°C/W
Junction to top of package
Ψ
jt
41,5
5 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter
is written in conformance with Psi-JT.
°C/W
Maximum operating junction temperature
Tj
105
oC
T
J
T
A
P
D
Θ
JMA
×
()
+
=
P
D
K
T
J
273
°C
+
()
---------------------------------
=
KP
D
T
A
273
°C
×
() Q
JMA
P
D
2
×
+
×
=
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