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参数资料
| 型号： | M54HC692 |
| 厂商： | 意法半导体 |
| 元件分类： | 通用总线功能 |
| 英文描述： | Decade Up/Down Counter/Register(十进制j加/减计数器/寄存器) |
| 中文描述： | 十年加/减计数器/寄存器（十进制?加/减计数器/寄存器） |
| 文件页数： | 2/23页 |
| 文件大小： | 433K |
| 代理商： | M54HC692 |
counter’s outputsare stored inthe output register at
the positive edge of the register clock (RCK). If the
register clear input (RCLR) is held ”L” the register is
cleared (synchronously
to
register
clock
for
HC692/HC693
HC690/HC691). Allinputsareequipped withprotec-
tion circuits against static discharge and transient
excess voltage.
and
asynchronously
for
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
3 to 6
7, 14
15 to 18
1
SYMBOL
A to D
ENT, ENP
QA to QD
CCLR
NAME AND FUNCTION
Data Inputs
Enable Inputs
Data Outputs
Counter Clear (Active
LOW)
Counter Clock
Counter/ Register Select
Register Clear (Active
LOW)
Register Clock
Ripple Counter Output
Ground (0V)
Positive Supply Voltage
2
CCK
R/C
RCLR
11
8
9
RCK
RCO
GND
V
CC
19
10
20
IEC LOGIC SYMBOLS
HC691
HC692
HC693
HC690
M54/M74HC690/691/692/693
2/23
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