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参数资料
| 型号： | M5M5255FP-70XL |
| 厂商： | Mitsubishi Electric Corporation |
| 英文描述： | 262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM |
| 中文描述： | 262,144位（32,768字8位）的CMOS静态RAM |
| 文件页数： | 6/7页 |
| 文件大小： | 64K |
| 代理商： | M5M5255FP-70XL |
MITSUBISHI LSIs
262,144-BIT (32,768-WORD BY 8-BIT) CMOS STATIC RAM
MITSUBISHI
ELECTRIC
M5M5255DP,FP -45LL,-55LL,-70LL,
-45XL,-55XL,-70XL
'97.4.7
6
Write cycle ( /S
1
control mode)
Write cycle (S
2
control mode)
t
su
(S1)
(Note 3)
(Note 3)
t
rec
(W)
t
h
(D)
t
CW
(Note 5)
(Note 3)
(Note 3)
t
su
(A)
(Note 4)
t
su
(D)
t
h
(D)
t
CW
(Note 5)
(Note 3)
(Note 3)
t
su
(S2)
t
rec
(W)
t
su
(A)
(Note 4)
(Note 3)
(Note 3)
t
su
(D)
DATA IN
STABLE
DATA IN
STABLE
DQ
1~8
/S
1
S
2
/W
A
0~14
DQ
1~8
/S
1
S
2
/W
A
0~14
Note 3 : Hatching indicates the state is "don't care".
4 : Writing is executed while S2 high overlaps /S1 and /W low.
5 : When the falling edge of /W is simultaneously or prior to the falling edge of /S1
or rising edge of S2, the outputs are maintained in the high impedance state.
6 : Don't apply inverted phase signal externally when DQ pin is output mode.
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