参数资料
型号: M68Z128N
厂商: 意法半导体
英文描述: 5V, 1 Mbit 128Kb x8 Low Power SRAM with Output Enable
中文描述: 5V的,1兆位的输出128KB的x8低功耗SRAM启用
文件页数: 7/12页
文件大小: 95K
代理商: M68Z128N
7/12
M68Z128
Table 8. Write Mode AC Characteristics
(T
A
= 0 to 70°C; V
CC
= 5V ±10%)
Note: 1. C
L
= 5pF.
2. At any given temperature and voltage condition, t
WHQX
is less than t
WLQZ
for any given device.
Symbol
Parameter
M68Z128
Unit
-55
Min
Max
t
AVAV
Write Cycle Time
55
ns
t
AVWL
Address Valid to Write Enable Low
0
ns
t
AVWH
Address Valid to Write Enable High
45
ns
t
AVE1H
Address Valid to Chip Enable 1 High
45
ns
t
AVE2L
Address Valid to Chip Enable 2 Low
45
ns
t
WLWH
Write Enable Pulse Width
45
ns
t
WHAX
Write Enable High to Address Transition
0
ns
t
WHDX
Write Enable High to Input Transition
0
ns
t
WHQX (2)
Write Enable High to Output Transition
5
ns
t
WLQZ (1,2)
Write Enable Low to Output Hi-Z
20
ns
t
AVE1L
Address Valid to Chip Enable 1 Low
0
ns
t
AVE2H
Address Valid to Chip Enable 2 High
0
ns
t
E1LE1H
Chip Enable 1 Low to Chip Enable 1 High
45
ns
t
E2HE2L
Chip Enable 2 High to Chip Enable 2 Low
45
ns
t
E1HAX
Chip Enable 1 High to Address Transition
0
ns
t
E2LAX
Chip Enable 2 Low to Address Transition
0
ns
t
DVWH
Input Valid to Write Enable High
25
ns
t
DVE1H
Input Valid to Chip Enable 1 High
25
ns
t
DVE2L
Input Valid to Chip Enable 2 Low
25
ns
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