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参数资料
| 型号： | M69AW024BE60ZB8F |
| 厂商： | 意法半导体 |
| 英文描述： | 16 Mbit (1M x16) 3V Asynchronous PSRAM |
| 中文描述： | 16兆位（1米× 16）3V的异步移动存储芯片 |
| 文件页数： | 12/25页 |
| 文件大小： | 147K |
| 代理商： | M69AW024BE60ZB8F |
M69AW024BE
12/25
Table 5. Capacitance
Note: 1. Outputs deselected.
Table 6. DC Characteristics
Note: 1. Average AC current, Outputs open, cycling at t
AVAX
(min).
2. Maximum DC voltage on inputs and I/O pins is V
CC
+ 0.2V.
During voltage transitions, data inputs may overshoot to V
CC
+ 1.0V for a period of up to 5ns.
3. Minimum DC voltage on input or I/O pins is –0.3V.
During voltage transitions, data inputs may overshoot to V
SS
+ 1.0V for a period of up to 5ns.
Symbol
Parameter
Test
Condition
Min
Max
Unit
C
IN
Input Capacitance on all pins (except DQ)
V
IN
= 0V
5
pF
C
OUT (1)
Output Capacitance
V
OUT
= 0V
8
pF
Symbol
Parameter
Test Condition
Min
Max
Unit
I
CC1 (1)
Operating Supply
Current
V
CC
= 3.3V,
V
IN
= V
IH
or V
IL
,
E1
=
V
IL
, E2
=
V
IH
, I
OUT
= 0mA
t
RC
/t
WC
=
Min
20
mA
t
RC
/t
WC
=
1μs
3.0
mA
I
LI
Input Leakage
Current
0V
≤
V
IN
≤
V
CC
–1
1
μA
I
LO
Output Leakage
Current
0V
≤
V
OUT
≤
V
CC
–1
1
μA
I
PD
Deep Power Down
Current
V
CC
= 3.3V,
V
IN
=
V
IH
or V
IL
,
E2
≤
0.2V
10
μA
I
SB
Standby Supply
Current CMOS
3.1V
≤
V
CC
≤
3.3V,
V
IN
≤
0.2V or
≥
V
CC
–0.2V,
E1
≥
V
CC
–0.2V and
E2
≥
V
CC
–0.2V), I
OUT
= 0mA
100
μA
2.7V
≤
V
CC
≤
3.1V,
V
IN
≤
0.2V or
≥
V
CC
–0.2V,
E1
≥
V
CC
–0.2V and
E2
≥
V
CC
–0.2V), I
OUT
= 0mA
70
μA
V
IH (2)
Input High Voltage
2.7V
≤
V
CC
≤
3.3V
0.8V
CC
V
CC
+ 0.2
V
V
IL (3)
Input Low Voltage
2.7V
≤
V
CC
≤
3.3V
–0.3
0.2V
CC
V
V
OH
Output High Voltage
3.1V
≤
V
CC
≤
3.3V, I
OH
= –0.5mA
2.5
V
2.7V
≤
V
CC
≤
3.1V, I
OH
= –0.5mA
2.2
V
V
OL
Output Low Voltage
I
OL
= 1mA
0.4
V
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