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参数资料
| 型号： | M93S66-DW1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 256 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.169 INCH, PLASTIC, TSSOP-8 |
| 文件页数： | 10/23页 |
| 文件大小： | 163K |
| 代理商： | M93S66-DW1 |
AI01395
S
An-1
C
D
WRITE
START
D0
"1"
"0"
An
Glitch
An-2
ADDRESS AND DATA
ARE SHIFTED BY ONE BIT
Figure 10. Write Sequence with One Clock Glitch
COMMON I/O OPERATION
The Data Output (Q) and Data Input (D) signals can
be connected together, through a current limiting
resistor, to form a common, one wire data bus.
Some precautions must be taken when operating
the memory with this connection, mostly to prevent
a short circuit between the last entered address bit
(A0) and the first data bit output by Q. The reader
should refer to the STMicroelectronics application
note AN394 "MICROWIRE EEPROM Common I/O
Operation".
CLOCK PULSE COUNTER
The M93Sx6 offers a functional security filtering
glitches on the clock input (C), the clock pulse
counter.
In a normal environment, the M93Sx6 expectes to
receive the exact amount of data on the D input
(start bit, Op-Code, Address, Data), that is the
exact amount of clock pulses on the C input. In a
noisy environment, the number of pulses received
(on the clock input C) may be greater than the clock
pulses delivered by the Master (Microcontroller)
driving the M93Sx6. In such a case, a part of the
instruction is delayed by one bit (see Figure 10),
and it may induce an erroneous write of data at a
wrong address. The M93Sx6 has an on-chip
counter which counts the clock pulses from the
Start bit until the falling edge of the Chip Select
signal.
For the WRITE instructions with a M93S56 (or
M93S66), the number of clock pulses incoming to
the counter must be exactly 27 from the Start bit to
the falling edge of Chip Select signal (1 Start bit +
2 Op-code bit + 8 Address bit + 16 Data bit = 27):
if so, the M93S56 (or M93S66) executes the
WRITE instruction. If the number of clock pulses is
not equal to 27, the instruction will not be executed
(and data will not be corrupted).
The clock pulse counter is active on WRITE,
PAWRITE, WRALL, PRWRITE and PRCLEAR in-
structions. In order to determine the exact number
of clock pulses needed for all the M93Sx6 on
WRITE instructions, refer to Tables 7a and 7b, in
the column: Requested Clock Cycles.
18/23
M93S66, M93S56, M93S46
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M93S66-DW3 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S66-DW3G | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S66-DW3P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S66-DW3T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S66-DW3TG | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
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