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参数资料
| 型号： | MA330011 |
| 厂商： | Microchip Technology |
| 文件页数： | 166/199页 |
| 文件大小： | 0K |
| 描述： | MODULE DSPIC33 100P TO 100QFP |
| 标准包装： | 1 |
| 附件类型： | 插拔式模块（PIM）- dsPIC33FJ256GP710 |
| 适用于相关产品： | Explorer 16（DM240001 或 DM240002） |
| 产品目录页面： | 658 (CN2011-ZH PDF) |
| 相关产品： | DSPIC33FJ64GP710T-I/PT-ND - IC DSPIC MCU/DSP 64K 100TQFP DSPIC33FJ64GP710T-I/PF-ND - IC DSPIC MCU/DSP 64K 100TQFP DSPIC33FJ64GP310T-I/PT-ND - IC DSPIC MCU/DSP 64K 100TQFP DSPIC33FJ64GP310T-I/PF-ND - IC DSPIC MCU/DSP 64K 100TQFP DSPIC33FJ256GP510T-I/PT-ND - IC DSPIC MCU/DSP 256K 100TQFP DSPIC33FJ256GP510T-I/PF-ND - IC DSPIC MCU/DSP 256K 100TQFP DSPIC33FJ128GP310T-I/PT-ND - IC DSPIC MCU/DSP 128K 100TQFP DSPIC33FJ128GP310T-I/PF-ND - IC DSPIC MCU/DSP 128K 100TQFP DSPIC33FJ256GP710T-I/PT-ND - IC DSPIC MCU/DSP 256K 100TQFP DSPIC33FJ256GP710T-I/PF-ND - IC DSPIC MCU/DSP 128K 100TQFP 更多... |
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2007 Microchip Technology Inc.
Preliminary
DS70165E-page 67
dsPIC33F
3.2.7
SOFTWARE STACK
In addition to its use as a working register, the W15
register in the dsPIC33F devices is also used as a soft-
ware Stack Pointer. The Stack Pointer always points to
the first available free word and grows from lower to
higher addresses. It pre-decrements for stack pops and
post-increments for stack pushes, as shown in
Figure 3-6. For a PC push during any CALL instruction,
the MSb of the PC is zero-extended before the push,
ensuring that the MSb is always clear.
The Stack Pointer Limit register (SPLIM) associated
with the Stack Pointer sets an upper address boundary
for the stack. SPLIM is uninitialized at Reset. As is the
case for the Stack Pointer, SPLIM<0> is forced to ‘0’
because all stack operations must be word-aligned.
Whenever an EA is generated using W15 as a source
or
destination pointer, the resulting
address is
compared with the value in SPLIM. If the contents of
the Stack Pointer (W15) and the SPLIM register are
equal and a push operation is performed, a stack error
trap will not occur. The stack error trap will occur on a
subsequent push operation. Thus, for example, if it is
desirable to cause a stack error trap when the stack
grows beyond address 0x2000 in RAM, initialize the
SPLIM with the value 0x1FFE.
Similarly, a Stack Pointer underflow (stack error) trap is
generated when the Stack Pointer address is found to
be less than 0x0800. This prevents the stack from
interfering with the Special Function Register (SFR)
space.
A write to the SPLIM register should not be immediately
followed by an indirect read operation using W15.
FIGURE 3-6:
CALL
STACK FRAME
3.2.8
DATA RAM PROTECTION FEATURE
The dsPIC33F product family supports Data RAM pro-
tection features which enable segments of RAM to be
protected when used in conjunction with Boot and
Secure Code Segment Security. BSRAM (Secure RAM
segment for BS) is accessible only from the Boot Seg-
ment Flash code when enabled. SSRAM (Secure RAM
segment for RAM) is accessible only from the Secure
Segment Flash code when enabled. See Table 3-1 for
an overview of the BSRAM and SSRAM SFRs.
3.3
Instruction Addressing Modes
The addressing modes in Table 3-35 form the basis of
the addressing modes optimized to support the specific
features of individual instructions. The addressing
modes provided in the MAC class of instructions are
somewhat different from those in the other instruction
types.
3.3.1
FILE REGISTER INSTRUCTIONS
Most file register instructions use a 13-bit address field
(f) to directly address data present in the first 8192
bytes of data memory (Near Data Space). Most file
register instructions employ a working register, W0,
which is denoted as WREG in these instructions. The
destination is typically either the same file register or
WREG (with the exception of the MUL instruction),
which writes the result to a register or register pair. The
MOV
instruction allows additional flexibility and can
access the entire data space.
3.3.2
MCU INSTRUCTIONS
The 3-operand MCU instructions are of the form:
Operand 3 = Operand 1 <function> Operand 2
where Operand 1 is always a working register (i.e., the
addressing mode can only be register direct) which is
referred to as Wb. Operand 2 can be a W register,
fetched from data memory, or a 5-bit literal. The result
location can be either a W register or a data memory
location.
The
following
addressing
modes
are
supported by MCU instructions:
Register Direct
Register Indirect
Register Indirect Post-Modified
Register Indirect Pre-Modified
5-bit or 10-bit Literal
Note:
A PC push during exception processing
concatenates the SRL register to the MSb
of the PC prior to the push.
<Free Word>
PC<15:0>
000000000
0
15
W15 (before CALL)
W15 (after CALL)
S
ta
ck
Gr
o
w
s
T
o
wa
rd
s
Hig
her
Ad
dres
s
0x0000
PC<22:16>
POP
: [--W15]
PUSH : [W15++]
Note:
Not
all
instructions
support
all
the
addressing modes given above. Individual
instructions may support different subsets
of these addressing modes.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MA330011 | 制造商:Microchip Technology Inc 功能描述:dsPIC33 GP 100P to 100P TQFP Plug-In Mod |
| MA330012 | 功能描述:子卡和OEM板 dsPIC33F GP 100P to 84P Plug In Module RoHS:否 制造商:BeagleBoard by CircuitCo 产品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| MA330013 | 功能描述:子卡和OEM板 dsPIC33F Plug In Module RoHS:否 制造商:BeagleBoard by CircuitCo 产品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| MA330014 | 功能描述:子卡和OEM板 dsPIC33 MC RoHS:否 制造商:BeagleBoard by CircuitCo 产品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| MA330015 | 功能描述:子卡和OEM板 dsPIC33 GP RoHS:否 制造商:BeagleBoard by CircuitCo 产品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
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