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参数资料
| 型号： | MAX11040GUU+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 14/35页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 4CH 38-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| 位数： | 24 |
| 采样率（每秒）： | 64k |
| 数据接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 转换器数目： | 4 |
| 功率耗散（最大）： | 108mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 38-TFSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 38-TSSOP |
| 包装： | 管件 |
| 输入数目和类型： | 4 个差分，双极 |
| 配用： | MAXSPCSPARTAN6+-ND - ADC and DAC Eval Expansion Board |
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MAX11040K/MAX11060
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
Cascadable, Sigma-Delta ADCs
21
Maxim Integrated
Data Rate Control Register
The Data Rate Control register controls the output data
period, which corresponds to the output data rate of
the ADC. The data period is controlled by both a
coarse (FSAMPC[2:0]) and a fine (FSAMPF[10:0])
adjustment (see Table 8).
The final data rate is derived by dividing the XIN clock
frequency by a divider value. The divider value is a
function of FSAMPC[2:0] and FSAMPF[10:0]:
Data Rate = fXINCLOCK/Divider
Divider = Coarse Cycle Factor x 384 + Fine Cycle
Factor x FSAMPF[10:0]
Note: Fractional results for the divider are rounded
down to the nearest integer. Coarse cycle factor and
fine cycle factor come from Table 8. The effect of
FSAMPF[10:0] in the formula has limitations as noted in
the table.
Examples of output data rate vs. FSAMPC[2:0] and
FSAMPF[10:0] are shown in Table 9. Table 10 shows
typical device performance for various data rate settings.
CS
DIN
SCLK
DOUT
CASCOUT0
(CASCIN0 = 0)
DRDYOUT0
(DRDYIN0 = 0)
DRDYOUT1
CASCOUT1
DEVICE 0 DATA READY
DEVICE 0 AND DEVICE 1 DATA READY
24 CYCLES
CHANNEL 0
DEVICE 0
CHANNEL 1
DEVICE 0
CHANNEL 2
DEVICE 0
CHANNEL 3
DEVICE 0
CHANNEL 0
DEVICE 1
CHANNEL 1
DEVICE 1
CHANNEL 2
DEVICE 1
CHANNEL 3
DEVICE 1
24 CYCLES
DEVICE 1 TAKES OVER SPI BUS
Figure 11. 192-Bit Data Read Operation Diagram for Two Cascaded Devices
Table 7. Data Register (MAX11060) (continued)
BIT
NAME
DESCRIPTION
[31:29]
000
—
[28:26]
IC[2:0]
Device address tag. IC[2:0] starts with 000 for the device nearest the master.
[25:24]
10
Channel 2 address tag = 10
[23:8]
CH3DATA[15:0]
Channel 3 16-bit conversion result (two’s complement)
[7:5]
000
—
[4:2]
IC[2:0]
Device address tag. IC[2:0] starts with 000 for the device nearest the master.
[1:0]
11
Channel 3 address tag = 11
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11040GUU/GH9 | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX11040GUU+ | 功能描述:模数转换器 - ADC 24Bit 4Ch Simul-Samp Cascadable Sig Delt RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11040GUU+T | 功能描述:模数转换器 - ADC 24Bit 4Ch Simul-Samp Cascadable Sig Delt RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11040K | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs |
| MAX11040K_1111 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:24-/16-Bit, 4-Channel, Simultaneous-Sampling, Cascadable, Sigma-Delta ADCs |
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