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参数资料
| 型号： | MAX11055ECB+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT PAR 250KSPS 64TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 160 |
| 位数： | 14 |
| 采样率（每秒）： | 250k |
| 数据接口： | 并联 |
| 转换器数目： | 6 |
| 功率耗散（最大）： | 3.48W |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-TQFP 裸露焊盘 |
| 供应商设备封装： | 64-TQFP-EP（10x10） |
| 包装： | 管件 |
| 输入数目和类型： | 6 个单端，双极 |
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4-/6-/8-Channel, 16-/14-Bit,
Simultaneous-Sampling ADCs
24
Maxim Integrated
MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B/MAX11054/MAX11055/MAX11056
(10/4.096) x VREF x (16,382/16,384) for 14-bit devices.
For the MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B, top code transition is 0x7FFE to
0x7FFF in two’s complement mode and 0xFFFE to
0xFFFF in offset binary mode. The bottom code transition
is 0x8000 and 0x8001 in two’s complement mode and
0x0000 and 0x0001 in offset binary mode. For the
MAX11054/MAX11055/MAX11056, top code transition is
0x1FFE to 0x1FFF in two’s complement mode and
0x3FFE to 0x3FFF in offset binary mode. The bottom code
transition is 0x2000 and 0x2001 in two’s complement
mode and 0x0000 and 0x0001 in offset binary mode. For
the MAX11044/MAX11044B/MAX11045/MAX11045B/
MAX11046/MAX11046B and MAX11054/MAX11055/
MAX11056, the analog input voltage to produce these
code transitions is measured and the gain error is com-
puted by subtracting (10/4.096) x VREF x (65,534/65,536)
or (10/4.096) x VREF x (16,382/16,384), respectively from
this measurement.
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, SNR is the ratio of the full-scale analog input
(RMS value) to the RMS quantization error (residual
error). The ideal, theoretical minimum analog-to-digital
noise is caused by quantization noise error only and
results directly from the ADC’s resolution (N bits):
SNR = (6.02 x N + 1.76)dB
where N = 16/14 bits. In reality, there are other noise
sources besides quantization noise: thermal noise, ref-
erence noise, clock jitter, etc. SNR is computed by tak-
ing the ratio of the RMS signal to the RMS noise, which
includes all spectral components not including the fun-
damental, the first five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is the ratio of the fundamental input frequency’s
RMS amplitude to the RMS equivalent of all the other
ADC output signals:
Effective Number of Bits (ENOB)
The ENOB indicates the global accuracy of an ADC at
a specific input frequency and sampling rate. An ideal
ADC’s error consists of quantization noise only. With an
input range equal to the full-scale range of the ADC,
calculate the ENOB as follows:
Total Harmonic Distortion (THD)
THD is the ratio of the RMS of the first five harmonics of
the input signal to the fundamental itself. This is:
expressed as:
where V1 is the fundamental amplitude and V2 through
V5 are the 2nd- through 5th-order harmonics.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio of the RMS amplitude of the funda-
mental (maximum signal component) to the RMS value
of the next-largest frequency component.
Aperture Delay
Aperture delay (tAD) is the time delay from the sampling
clock edge to the instant when an actual sample is
taken.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
aperture delay.
Channel-to-Channel Isolation
Channel-to-channel isolation indicates how well each
analog input is isolated from the other channels.
Channel-to-channel isolation is measured by applying
DC to channels 1 to 7, while a -0.4dBFS sine wave at
60Hz is applied to channel 0. A 10ksps FFT is taken for
channel 0 and channel 1. Channel-to-channel isolation
is expressed in dB as the power ratio of the two 60Hz
magnitudes.
Small-Signal Bandwidth
A small -20dBFS analog input signal is applied to an
ADC in a manner that ensures that the signal’s slew
rate does not limit the ADC’s performance. The input
frequency is then swept up to the point where the
amplitude of the digitized conversion result has
decreased 3dB.
Full-Power Bandwidth
A large -0.5dBFS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by 3dB. This point is defined as full-
power input bandwidth frequency.
THD
VVVV
V
=×
+++
20
2
3
2
4
2
5
2
1
log
ENOB
SINAD
=
176
602
.
SINAD dB
Signal
Noise Distortion
RMS
(
)
log
()
=×
+
10
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX11055ECB+ | 功能描述:模数转换器 - ADC 14Bit 6Ch Simult Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11055ECB+T | 功能描述:模数转换器 - ADC 14Bit 6Ch Simult Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11056 | 制造商:MAXIM 制造商全称:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs |
| MAX11056ECB+ | 功能描述:模数转换器 - ADC 14Bit 8Ch Simult Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX11056ECB+T | 功能描述:模数转换器 - ADC 14Bit 8Ch Simult Sampling RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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