参数资料
型号: MAX1143BCAP+T
厂商: Maxim Integrated Products
文件页数: 6/20页
文件大小: 0K
描述: IC ADC 14BIT 200KSPS 20-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
位数: 14
采样率(每秒): 200k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 640mW
电压电源: 模拟和数字
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 带卷 (TR)
输入数目和类型: 1 个单端,单极;1 个单端,双极
MAX1142/MAX1143
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
14
______________________________________________________________________________________
External reference
An external reference can be placed at either the input
(REFADJ) or the output (REF) of the MAX1142/
MAX1143’s internal buffer amplifier.
When connecting an external reference to REFADJ, the
input impedance is typically 9k
. Using the buffered
REFADJ input makes buffering of the external reference
unnecessary. The internal buffer output must be
bypassed at REF with a 2.2F capacitor.
When connecting an external reference at REF,
REFADJ must be connected to AVDD. The input imped-
ance at REF is 16k
for DC currents. During conver-
sion, an external reference at REF must deliver 250A
DC load current and have an output impedance of 10
or less. If the reference has a higher output impedance
or is noisy, bypass it at the REF pin with a 4.7F capac-
itor.
Analog Input
The MAX1142/MAX1143 use a capacitive DAC that
provides an inherent track/hold function. Drive AIN with
a source impedance less than 10
. Any signal condi-
tioning circuitry must settle with 16-bit accuracy in less
than 500ns. Limit the input bandwidth to less than half
the sampling frequency to eliminate aliasing. The
MAX1142/MAX1143 has a complex input impedance
which varies from unipolar to bipolar mode (Figure 1).
Input Range
The analog input range in unipolar mode is 0 to +12V
for the MAX1142, and 0 to +4.096V for the MAX1143. In
bipolar mode, the analog input can be -12V to +12V for
the MAX1142, and -4.096V to +4.096V for the
MAX1143. Unipolar and bipolar mode is programmed
with the UNI/
BIP bit of the Control-Byte. When using a
reference other than the MAX1142/MAX1143’s internal
+4.096V reference, the full-scale input range will vary
accordingly. The full-scale input range depends on the
voltage at REF and the sampling mode selected (Tables
3 and 4).
Input Acquisition and Settling
Clocking-in a Control-Byte starts input acquisition. In
bipolar mode, the main capacitor array starts acquiring
the input as soon as a start bit is recognized. If unipolar
mode is selected by the second DIN bit, the part will
immediately switch to unipolar sampling mode and
acquire a sample.
Acquisition can be extended by eight clock cycles by
setting M1 = 1, M0 = 1 (long acquisition mode). The
sampling instant in short acquisition completes on the
falling edge of the sixth clock cycle after the start bit
(Figure 2).
+5V
510k
100k
24k
0.22
F
REFADJ
MAX1142
Figure 7. MAX1142 Reference-Adjust Circuit
Table 3. Unipolar Full Scale and Zero Scale
PART
REFERENCE
ZERO SCALE
FULL SCALE
Internal
0
+12V
MAX1142
External
0
+12(VREF/4.096)
Internal
0
+4.096V
MAX1143
External
0
+VREF
Table 4. Bipolar Full Scale, Zero Scale, and Negative Scale
PART
REFERENCE
NEGATIVE FULL
SCALE
ZERO SCALE
FULL SCALE
Internal
-12V
0
+12V
MAX1142
External
-12(VREF/4.096)
0
+12(VREF/4.096)
Internal
-4.096V
0
+4.096V
MAX1143
External
-VREF
0
+VREF
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