参数资料
型号: MAX1168BCEG+T
厂商: Maxim Integrated Products
文件页数: 6/30页
文件大小: 0K
描述: IC ADC 16BIT 200KSPS 24-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 16
采样率(每秒): 200k
数据接口: MICROWIRE?,QSPI?,串行,SPI?
转换器数目: 1
功率耗散(最大): 762mW
电压电源: 模拟和数字
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SSOP(0.154",3.90mm 宽)
供应商设备封装: 24-QSOP
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极
MAX1167/MAX1168
Digital Interface
The MAX1167/MAX1168 feature an SPI/QSPI/
MICROWIRE-compatible, 3-wire serial interface. The
MAX1167 digital interface consists of digital inputs CS,
SCLK, and DIN and outputs DOUT and EOC. The
MAX1167 operates in the following modes:
SPI interface with external clock
SPI interface with internal clock
SPI interface with internal clock and scan mode
In addition to the standard 3-wire serial interface modes,
the MAX1168 includes a DSPR input and a DSPX output
for communicating with DSPs in external clock mode and
a DSEL input to determine 8-bit-wide or 16-bit-wide data-
transfer mode. When not using the MAX1168 in the DSP
interface mode, connect DSPR to DVDD and leave DSPX
unconnected.
Command/Configuration/Control Register
Table 1 shows the contents of the command/configura-
tion/control register and the state of each bit after initial
power-up. Tables 2–6 define the control and configuration
of the device for each bit. Cycling the power supplies
resets the command/configuration/control register to the
power-on-reset default state.
Initialization After Power-Up
A logic high on CS places the MAX1167/MAX1168 in
the shutdown mode chosen by the power-down bits,
and places DOUT in a high-impedance state. Drive CS
low to power up and enable the MAX1167/MAX1168
before starting a conversion. In internal reference
mode, allow 5ms for the shutdown internal reference
and/or buffer to wake and stabilize before starting a
conversion. In external reference mode (or if the inter-
nal reference is already on), no reference settling time
is needed after power-up.
Multichannel, 16-Bit, 200ksps Analog-to-Digital
Converters
14
______________________________________________________________________________________
SCLK
DOUT
AGND
DGND
AIN0
REF
AVDD
DVDD
DOUT
SCLK
CS
+5V
DIN
ANALOG
INPUTS
+5V
1
μF
0.1
μF
0.1
μF
GND
MAX1167
0.1
μF
AIN1
AIN2
AIN3
DIN
EOC
AGND
REFCAP
CS
Figure 5. MAX1167 Typical Operating Circuit
SCLK
DOUT
AGND
DGND
AIN0
REF
AVDD
DVDD
DOUT
SCLK
CS
+5V
16
8
DIN
ANALOG
INPUTS
+5V
1
μF
0.1
μF
0.1
μF
GND
MAX1168
0.1
μF
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
DIN
DSEL
DSPR
DSPX
EOC
AGND
REFCAP
EOC
CS
Figure 6. MAX1168 T ypical Operating Circuit
AUTOZERO
RAIL
CAPACITIVE
DAC
CDAC
REF
AGND
TRACK
HOLD
TRACK
ZERO
MUX
RIN
RDSON
AIN_
CMUX
CSWITCH
Figure 7. Equivalent Input Circuit
BIT7 (MSB)
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0 (LSB)
COMMAND
CH SEL2
CH SEL1
CH SEL0
SCAN1
SCAN0
REF/PD_SEL1
REF/PD SEL0
INT/EXT CLK
POWER-UP
STATE
0
110
Table 1. Command/Configuration/Control Register
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