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| 型号： | MAX1181ECM+D |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/20页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 80MSPS DUAL 48-TQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 250 |
| 位数： | 10 |
| 采样率（每秒）： | 80M |
| 数据接口： | 并联 |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 291mW |
| 电压电源： | 单电源 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP 裸露焊盘 |
| 供应商设备封装： | 48-TQFP 裸露焊盘（7x7） |
| 包装： | 托盘 |
| 输入数目和类型： | 4 个单端，双极；2 个差分，双极 |
| 产品目录页面： | 1396 (CN2011-ZH PDF) |
MAX1181
Dual 10-Bit, 80Msps, 3V, Low-Power ADC
with Internal Reference and Parallel Outputs
_______________________________________________________________________________________
5
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
010
15
5
2025303540
FFT PLOT CHA (8192-POINT RECORD,
DIFFERENTIAL INPUT)
MAX1181
toc01
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fINA = 6.0449MHz
fINB = 7.5099MHz
fCLK = 80.0006MHz
AINA = -0.46dBFS
CHA
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
010
15
5
2025303540
FFT PLOT CHB (8192-POINT RECORD,
DIFFERENTIAL INPUT)
MAX1181
toc02
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fINA = 6.0449MHz
fINB = 7.5099MHz
fCLK = 80.0006MHz
AINB = -0.52dBFS
CHB
-100
-80
-90
-60
-70
-40
-50
-30
-10
-20
0
010
15
5
2025303540
FFT PLOT CHA (8192-POINT RECORD,
DIFFERENTIAL INPUT)
MAX1181
toc03
ANALOG INPUT FREQUENCY (MHz)
AMPLITUDE
(dB)
fINA = 19.9123MHz
fINB = 24.9123MHz
fCLK = 80.0006MHz
AINA = -0.52dBFS
CHA
Typical Operating Characteristics
(VDD = 3V, OVDD = 2.5V, internal reference, differential input at -0.5dBFS, fCLK = 80.0006MHz, CL
≈ 10pF. TA = +25°C, unless other-
wise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Offset
±0.2
mV/V
Power Supply Rejection
PSRR
Gain
±0.1
%/V
TIMING CHARACTERISTICS
CLK Rise to Output Data Valid
tDO
Figure 3 (Note 5)
5
8
ns
Output Enable Time
tENABLE
Figure 4
10
ns
Output Disable Time
tDISABLE
Figure 4
1.5
ns
CLK Pulse-Width High
tCH
Figure 3 clock period: 12ns
6
±1
ns
CLK Pulse-Width Low
tCL
Figure 3 clock period: 12ns
6
±1
ns
Wakeup from sleep mode
0.28
Wake-Up Time (Note 6)
tWAKE
Wakeup from shutdown
1.5
s
CHANNEL-TO-CHANNEL MATCHING
Crosstalk
fINA or B = 20MHz at -0.5dBFS
-70
dB
Gain Matching
fINA or B = 20MHz at -0.5dBFS
0.02
±0.2
dB
Phase Matching
fINA or B = 20MHz at -0.5dBFS
0.25
degrees
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 3V, OVDD = 2.5V; 0.1F and 1.0F capacitors from REFP, REFN, and COM to GND; REFOUT connected to REFIN through a
10k
Ω resistor, VIN = 2VP-P (differential with respect to COM), CL = 10pF at digital outputs (Note 1), fCLK = 83.333MHz, TA = TMIN to
TMAX, unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
Note 1: Equivalent dynamic performance is obtainable over full OVDD range with reduced CL.
Note 2: Specifications at
≥ +25°C are guaranteed by production test and < +25°C are guaranteed by design and characterization.
Note 3: SNR, SINAD, THD, SFDR, and HD3 are based on an analog input voltage of -0.5dBFS, referenced to a +1.024V full-scale
input voltage range.
Note 4: Intermodulation distortion is the total power of the intermodulation products relative to the individual carrier. This number is
6dB or better, if referenced to the two-tone envelope.
Note 5: Digital outputs settle to VIH, VIL. Parameter guaranteed by design.
Note 6: With REFIN driven externally, REFP, COM, and REFN are left floating while powered down.
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