参数资料
型号: MAX1192ETI+T
厂商: Maxim Integrated Products
文件页数: 6/27页
文件大小: 0K
描述: IC ADC 8BIT 22MSPS DL 28-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
位数: 8
采样率(每秒): 22M
数据接口: 并联
转换器数目: 2
电压电源: 单电源
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-TQFN-EP(5x5)
包装: 带卷 (TR)
输入数目和类型: 4 个单端,双极;2 个差分,双极
MAX1192
Ultra-Low-Power, 22Msps, Dual 8-Bit ADC
14
______________________________________________________________________________________
SUPPLY CURRENT
vs. INPUT FREQUENCY
MAX1192 toc33
fIN (MHz)
DIGITAL
SUPPLY
CURRENT
(mA)
10
8
6
4
2
0.5
1.0
1.5
2.0
2.5
3.0
0
ANALOG
SUPPLY
CURRENT
(mA)
8.8
9.0
9.2
9.4
9.6
9.8
8.6
012
DIGITAL SUPPLY CURRENT
ANALOG SUPPLY CURRENT
SUPPLY CURRENT
vs. SAMPLING RATE
MAX1192
toc34
fCLK (MHz)
SUPPLY
CURRENT
(mA)
50
30
40
20
10
A: ANALOG SUPPLY CURRENT (IDD) - INTERNAL AND BUFFERED EXTERNAL
REFERENCE MODES
B: ANALOG SUPPLY CURRENT (IDD) - UNBUFFERED EXTERNAL REFERENCE MODE
C: DIGITAL SUPPLY CURRENT (IODD) - ALL REFERENCE MODES
5
10
15
20
25
0
060
A
B
C
fIN = 5.5112345MHz
Pin Description
PIN
NAME
FUNCTION
1
INA-
Channel A Negative Analog Input. For single-ended operation, connect INA- to COM.
2
INA+
Channel A Positive Analog Input. For single-ended operation, connect signal source to INA+.
3, 5, 10
GND
Analog Ground. Connect all GND pins together.
4
CLK
Converter Clock Input
6
INB+
Channel B Positive Analog Input. For single-ended operation, connect signal source to INB+.
7
INB-
Channel B Negative Analog Input. For single-ended operation, connect INB- to COM.
8, 9, 28
VDD
Converter Power Input. Connect to a 2.7V to 3.6V power supply. Bypass VDD to GND with a
combination of a 2.2F capacitor in parallel with a 0.1F capacitor.
11
OGND
Output Driver Ground
12
OVDD
Output Driver Power Input. Connect to a 1.8V to VDD power supply. Bypass OVDD to GND with a
combination of a 2.2F capacitor in parallel with a 0.1F capacitor.
13
D7
Tri-State Digital Output. D7 is the most significant bit (MSB).
14
D6
Tri-State Digital Output
15
D5
Tri-State Digital Output
16
D4
Tri-State Digital Output
17
A/
B
Channel Data Indicator. This digital output indicates channel A data (A/
B = 1) or channel B data
(A/
B = 0) is present on the output.
18
D3
Tri-State Digital Output
19
D2
Tri-State Digital Output
20
D1
Tri-State Digital Output
21
D0
Tri-State Digital Output. D0 is the least significant bit (LSB).
22
PD1
Power-Down Digital Input 1. See Table 3.
Typical Operating Characteristics (continued)
(VDD = 3.0V, OVDD = 1.8V, VREFIN = VDD (internal reference), CL
≈ 10pF at digital outputs, differential input at -0.5dB FS, fCLK =
22.005678MHz at 50% duty cycle, TA = +25°C, unless otherwise noted.)
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