参数资料
型号: MAX1203BEAP+T
厂商: Maxim Integrated Products
文件页数: 9/24页
文件大小: 0K
描述: IC ADC 12BIT 8CH 20-SSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,000
位数: 12
采样率(每秒): 133k
数据接口: MICROWIRE?,串行,SPI?
转换器数目: 1
功率耗散(最大): 7.5mW
电压电源: 双 ±
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 带卷 (TR)
输入数目和类型: 8 个单端,单极;8 个单端,双极;4 个差分,单极;4 个差分,双极
MAX1202/MAX1203
5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
______________________________________________________________________________________
17
Figure 11a. External Clock Mode, 15 Clocks/Conversion Timing
Figure 11b. External Clock Mode, 16 Clocks/Conversion Timing
Hardware Power-Down
The SHDN pin places the converter into full power-down
mode. Unlike the software power-down modes, conver-
sion is not completed; it stops coincidentally with SHDN
being brought low. There is no power-up delay if an
external reference, which is not shut down, is used.
SHDN also selects internal or external reference com-
pensation (Table 7).
Power-Down Sequencing
The MAX1202/MAX1203’s automatic power-down
modes can save considerable power when operating
at less than maximum sample rates. The following sec-
tions discuss the various power-down sequences.
Lowest Power at up to
500 Conversions per Channel per Second
Figure 14a depicts MAX1202 power consumption for one
or eight channel conversions using full power-down
mode and internal reference compensation. A 0.01F
bypass capacitor at REFADJ forms an RC filter with the
internal 20k
reference resistor, with a 0.2ms time con-
stant. To achieve full 12-bit accuracy, 10 time constants
(or 2ms in this example) are required for the reference
buffer to settle. When exiting FULLPD, waiting this 2ms in
FASTPD mode (instead of just exiting FULLPD mode and
returning to normal operating mode) reduces power con-
sumption by a factor of 10 or more (Figure 13).
Lowest Power at Higher Throughputs
Figure 14b shows power consumption with external-
reference compensation in fast power-down, with one
and eight channels converted. The external 4.7F com-
pensation requires a 50s wait after power-up. This cir-
cuit combines fast multichannel conversion with the
lowest power consumption possible. Full power-down
mode can increase power savings in applications where
the MAX1202/MAX1203 are inactive for long periods of
time, but where intermittent bursts of high-speed conver-
sion are required.
SCLK
DIN
DOUT
CS
S
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
CONVERSION RESULT 1
SSTRB
CONTROL BYTE 2
S
1
81
8
1
B4
B5
B6
B7
B8
B9
B10
B11
B3
B2
B1
B0
B4
B5
B6
B7
B8
B9
B10
B11
B3
B2
B1
B0
CS
SCLK
DIN
DOUT
S
CONTROL BYTE 0
CONTROL BYTE 1
S
CONVERSION RESULT 0
CONVERSION RESULT 1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B5
B6
B7
B8
B9
B10
B11
B1 B0
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