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参数资料
| 型号： | MAX1204AEAP+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 6/23页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 8CH 20-SSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 位数： | 10 |
| 采样率（每秒）： | 133k |
| 数据接口： | MICROWIRE?，串行，SPI? |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 640mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个单端，单极；8 个单端，双极；4 个差分，单极；4 个差分，双极 |
MAX1204
5V, 8-Channel, Serial, 10-Bit ADC
with 3V Digital Interface
14
Maxim Integrated
Figure 9. Internal Clock Mode Timing
SSTRB
CS
SCLK
DIN
DOUT
14
8
12
18
20
24
START
SEL2 SEL1 SEL0
UNI/
DIP
SGL/
DIF
PD1
PD0
B9
MSB
B8
B7
B0
LSB
S1
S0
ACQUISITION
1.5
s
(SCLK = 2MHz)
IDLE
FILLED WITH
ZEROS
IDLE
CONVERSION
10
s MAX
ADC STATE
2
3
5
6
7
9
10
11
19
21
22
23
tCONV
Data Framing
CS’s falling edge does not start a conversion on the
MAX1204. The first logic high clocked into DIN is inter-
preted as a start bit and defines the first bit of the control
byte. A conversion starts on SCLK’s falling edge after the
eighth bit of the control byte (the PD0 bit) is clocked into
DIN. The start bit is defined as:
The first high bit clocked into DIN with CS low any-
time the converter is idle; (e.g., after VDD is applied).
or
The first high bit clocked into DIN after bit 3 (B3) of a
conversion in progress appears at DOUT.
If a falling edge on CS forces a start bit before B3
becomes available, the current conversion is termi-
nated and a new one started. Thus, the fastest the
MAX1204 can run is 15 clocks/conversion. Figure 11a
shows the serial-interface timing necessary to perform
a conversion every 15 SCLK cycles in external clock
mode. If CS is low and SCLK is continuous, guarantee
a start bit by first clocking in 16 zeros.
Most microcontrollers (Cs) require that conversions
occur in multiples of eight SCLK clocks; 16 clocks per
conversion is typically the fastest that a C can drive
the MAX1204. Figure 11b shows the serial-interface
timing necessary to perform a conversion every 16
SCLK cycles in external clock mode.
Figure 10. Internal Clock Mode SSTRB Detailed Timing
PD0 CLOCK IN
tSSTRB
tCSH
tCONV
tSCK
SSTRB
SCLK
tCSS
NOTE: KEEP SCLK LOW DURING CONVERSION FOR BEST NOISE PERFORMANCE.
CS
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1204AEPP | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1204AEPP+ | 功能描述:模数转换器 - ADC 10-Bit 8Ch 133ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1204BCAP | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1204BCAP+ | 功能描述:模数转换器 - ADC 10-Bit 8Ch 133ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX1204BCAP+T | 功能描述:模数转换器 - ADC 10-Bit 8Ch 133ksps 5V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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