参数资料
| 型号： | MAX1358BETL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/71页 |
| 文件大小： | 0K |
| 描述： | IC DAS 16BIT 40-TQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 数据采集系统（DAS） |
| 分辨率（位）： | 16 b |
| 采样率（每秒）： | 21.94k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 电压电源： | 模拟和数字 |
| 电源电压： | 1.8 V ~ 3.6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘 |
| 供应商设备封装： | 40-TQFN-EP（6x6） |
| 包装： | 带卷 (TR) |
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MAX1358B
16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________
25
PIN
NAME
FUNCTION
23
SWA
DACA SPST Shunt Switch Input. Connects to OUTA through an SPST switch.
24
FBA
DACA Force-Sense Feedback Input. Analog input to mux.
25
OUTA
DACA Force-Sense Output. Analog input to mux.
26
AGND
Analog Ground
27
AVDD
Analog Supply Voltage. Also ADC reference voltage during AVDD measurement. Bypass to AGND with
10μF and 0.1μF capacitors in parallel as close to the pin as possible.
28
SWB
DACB SPST Shunt Switch Input. Connects to OUTB through an SPST switch.
29
FBB
DACB Force-Sense Feedback Input. Analog input to mux.
30
OUTB
Force-Sense DACB Ouput. Analog input to mux.
31
AIN2
Analog Input 2. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
32
AIN1
Analog Input 1. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
33
REF
Reference Input/Output. Output of the reference buffer amplifier or external reference input. Disabled at
power-up to allow external reference. Reference voltage for ADC and DACs.
34
REG
Linear Voltage-Regulator Output. Charge-pump-doubler input voltage. Bypass REG with a 10μF capacitor
to DGND for charge-pump regulation.
35
CF-
36
CF+
Charge-Pump Flying Capacitor Terminals. Connect an external 10μF (typ) capacitor between CF+ and CF-.
37
CPOUT
Charge-Pump Output. Connect an external 10μF (typ) reservoir capacitor between CPOUT and DGND. There is
a low threshold diode between DVDD and CPOUT. When the charge pump is disabled, CPOUT is pulled up
within 300mV (typ) of DVDD.
38
DVDD
Digital Supply Voltage. Bypass to DGND with 10μF and 0.1μF capacitors in parallel as close to the pin as
possible.
39
DGND
Digital Ground. Also ground for cascaded linear voltage regulator and charge-pump doubler.
40
UPIO1
User-Programmable Input/Output 1. See the UPIO1_CTRL Register for functionality.
—
EP
Exposed Pad. Leave unconnected or connect to AGND.
Pin Description (continued)
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