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参数资料
| 型号： | MAX1365ECM+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 9/25页 |
| 文件大小： | 0K |
| 描述： | IC PANEL METER 4.5 DIG 48LQFP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 显示器类型： | LED |
| 配置： | 7 段显示 |
| 数字或字符： | A/D，4.5 位数字 |
| 电源电压： | 2.7 V ~ 5.25 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
Stand-Alone, 4.5-/3.5-Digit Panel Meters
with 4–20mA Output
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NAME
AIN+
AIN-
GND
AV DD
DV DD
SET
REG_VDD
REG_FORCE
REG_AMP
CMP
DAC_VDD
DACVOUT
CONV_IN
4-20OUT
GND_DAC
GND_V/I
REF_DAC
EN_BPM
EN_I
REFSELE
FUNCTION
Positive Analog Input. Positive side of fully differential analog input. Bypass AIN+ to GND with a
0.1μF or greater capacitor.
Negative Analog Input. Negative side of fully differential analog input. Bypass AIN- to GND with a
0.1μF or greater capacitor.
Ground. Connect to star ground.
Analog Positive Supply Voltage. Connect AV DD to a +2.7V to +5.25V power supply. Bypass AV DD
to GND with a 0.1μF capacitor.
Digital Positive Supply Voltage. Connect DV DD to a +2.7V to +5.25V power supply. Bypass DV DD
to GND with a 0.1μF capacitor.
Segment Current Set. Connect to ground through a resistor to set the segment current. See Table
7 for segment-current selection.
V/I Converter Regulated Supply Output (5.2V typ)
REG_VDD Control. Drives the gate of external depletion-mode FET.
Regulator/Reference Buffer Supply. Connect to a 4.75V to 5.25V power supply.
Regulator Compensation Node. Connect a 0.1μF capacitor from CMP to REG_FORCE.
DAC Analog Supply. Connect DAC_VDD to a +2.7V to +5.25V power supply.
DAC Voltage Output. DAC output impedance is typically 6.2k ? .
V/I Converter Input
4–20mA (0 to 16mA) Current-Loop Output. Referenced to GND.
DAC Analog Ground. Connect to star ground.
V/I Converter Analog Ground. Connect to star ground.
V-to-I Converter/DAC Reference Input. Connect a voltage source for external reference operation
or leave floating for internal reference. Bypass REF_DAC with a 0.1μF capacitor to GND for either
internal or external reference operation.
Active-High V/I-Converter Bipolar-Mode Enable. Set high for bipolar mode. Set low for unipolar mode.
Active-High V/I-Converter 4mA Offset Enable. Set low for 0 to 16mA output. Set high for 4–20mA.
DAC External Reference Selection. Set low for internal reference. Set high for external reference.
Leave REF_DAC unconnected when REFSELE is low.
21
DACDATA_SEL DAC Data-Source Select. Connect to logic high for the MAX1365/MAX1367.
22
23
24
25
CS_DAC
INTREF
RANGE
PEAK
DAC Chip Select. Connect to logic high for the MAX1365/MAX1367.
ADC Reference Selection. Set INTREF high to select the internal ADC reference. Set INTREF low
to select external ADC reference.
ADC Range Select. Set RANGE low for ± 2V analog input voltage range. Set RANGE high for
± 200mV analog input voltage range.
Peak Logic Input. Connect PEAK to DV DD to display the highest ADC value on the LED. Connect
PEAK to GND to disable the PEAK function (see Table 1).
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