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参数资料
| 型号： | MAX1426EAI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/16页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BITS 10MSPS 28SSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,000 |
| 位数： | 10 |
| 采样率（每秒）： | 10M |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 210mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 28-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个差分，双极 |
MAX1426
10-Bit, 10Msps ADC
_______________________________________________________________________________________
9
Pin Description
Common-Mode Level Positive Input. For AC applications, connect to AVDD to internally set the input
DC bias level. For DC-coupled applications, connect to AGND.
CMLP
11
Common-Mode Level Negative Input. Connect to AGND to internally set the input DC bias level for
both AC- and DC-coupled applications.
CMLN
12
Clock Input. Clock frequency range from 0.1MHz to 10MHz.
CLK
13
Active-Low Output Enable and Power-Down Input. Digital outputs become high impedance and
device enters low-power mode when pin is high.
OE/PD
14
Digital Data Output (MSB)
D9
15
Negative Reference Output. Bypass to AGND with 0.1F capacitor. REFN can accept an external
voltage when the internal reference is disabled (REFN = AGND).
REFN
5
Common-Mode Level Input. Bypass to AGND with a 0.1F capacitor. CML can accept an external
voltage when the internal reference is disabled (REFN = AGND).
CML
6
Positive Analog Signal Input
INP
9
Negative Analog Signal Input
INN
10
External Reference Input. Bypass to AGND with a 0.1F capacitor. REFIN can be biased externally
to adjust the reference level and calibrate full-scale errors. To disable the internal reference, connect
REFIN to AGND.
REFIN
4
Positive Reference Output. Bypass to AGND with a 0.1F capacitor. If the internal reference is
disabled, REFP can accept an external voltage.
REFP
3
PIN
Analog Supply Voltage Input. Bypass with a parallel combination of 2.2F, 0.1F, and 100pF capacitors
to AGND. Bypass each supply input to the closest AGND (e.g., capacitors between pins 1 and 2).
AVDD
2, 8
Analog Ground. Connect all return paths for analog signals to these pins.
AGND
1, 7
FUNCTION
NAME
Digital Data Outputs 4–1
D4–D1
24–27
Digital Data Output (LSB)
D0
28
Digital Supply Voltage Input. Bypass with 2.2F and 0.1F capacitors in parallel. Digital supply can
operate with voltages as low as +2.7V.
DVDD
20, 22
Digital Ground
DGND
21, 23
Digital Data Outputs 8–5
D8–D5
16–19
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