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参数资料
| 型号： | MAX1434ECQ+TD |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/22页 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 50MSPS 100-TQFP |
| 标准包装： | 500 |
| 位数： | 10 |
| 采样率（每秒）： | 50M |
| 数据接口： | LVDS，串行 |
| 转换器数目： | 8 |
| 功率耗散（最大）： | 882mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | 100-TQFP 裸露焊盘 |
| 供应商设备封装： | 100-TQFP（14x14） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个差分 |
MAX1434
for RADJ connected between REFADJ and GND.
Using Transformer Coupling
An RF transformer (Figure 10) provides an excellent
solution to convert a single-ended input source signal
to a fully differential signal. The MAX1434 input com-
mon-mode voltage is internally biased to 0.76V (typ)
with fCLK = 50MHz. Although a 1:1 transformer is
shown, a step-up transformer can be selected to
reduce the drive requirements. A reduced signal swing
from the input driver, such as an op amp, can also
improve the overall distortion.
Grounding, Bypassing, and Board Layout
The MAX1434 requires high-speed board layout design
techniques. Refer to the MAX1434/MAX1436/MAX1437/
MAX1438 EV kit data sheet for a board layout refer-
ence. Locate all bypass capacitors as close to the
device as possible, preferably on the same side as the
ADC, using surface-mount devices for minimum induc-
tance. Bypass AVDD to GND with a 0.1F ceramic
capacitor in parallel with a 0.1F ceramic capacitor.
Bypass OVDD to GND with a 0.1F ceramic capacitor
in parallel with a
≥ 2.2F ceramic capacitor. Bypass
CVDD to GND with a 0.1F ceramic capacitor in paral-
lel with a
≥ 2.2F ceramic capacitor.
Multilayer boards with ample ground and power planes
produce the highest level of signal integrity. Connect
MAX1434 ground pins and the exposed pad to the
same ground plane. The MAX1434 relies on the
exposed-backside-pad connection for a low-induc-
tance ground connection. Isolate the ground plane
from any noisy digital system ground planes.
Route high-speed digital signal traces away from the
sensitive analog traces. Keep all signal lines short and
free of 90° turns.
Ensure that the differential analog input network layout is
symmetric and that all parasitics are balanced equally.
Refer to the MAX1434/MAX1436/MAX1437/MAX1438 EV
kit data sheet for an example of symmetric input layout.
Parameter Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from a straight line. For the
MAX1434, this straight line is between the end points of
the transfer function, once offset and gain errors have
been nullified. INL deviations are measured at every
step and the worst-case deviation is reported in the
Electrical Characteristics table.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step width and the ideal value of 1 LSB. A DNL
error specification of less than 1 LSB guarantees no
missing codes and a monotonic transfer function. For
the MAX1434, DNL deviations are measured at every
step and the worst-case deviation is reported in the
Electrical Characteristics table.
FSR
V
k
RADJ
=
07
1
125
.
Octal, 10-Bit, 50Msps, 1.8V ADC
with Serial LVDS Outputs
18
______________________________________________________________________________________
REFERENCE
BUFFER
REFIO
REFADJ
AVDD
AVDD/2
CONTROL LINE TO
DISABLE REFERENCE
BUFFER
ADC FULL-SCALE = REFT - REFB
G
1V
0.1
F
REFERENCE-
SCALING
AMPLIFIER
REFT
REFB
25k
TO 250k
25k
TO 250k
MAX1434
Figure 9. Circuit Suggestions to Adjust the ADC’s Full-Scale
Range
MAX1434
VIN
0.1
F
0.1
F
N.C.
1
2
3
6
5
4
T1
MINICIRCUITS
ADT1-1WT
10
10
39pF
IN_P
IN_N
Figure 10. Transformer-Coupled Input Drive
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