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参数资料
| 型号： | MAX1459AAP+T |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 模拟信号调理 |
| 英文描述： | 2-Wire, 4-20mA Smart Signal Conditioner |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封装： | 5.30 MM, 0.65 MM PITCH, SSOP-20 |
| 文件页数： | 2/24页 |
| 文件大小： | 243K |
| 代理商： | MAX1459AAP+T |
MAX1459
EEPROM when the U bit of the INIT sequence is
zero.
A transition from high to low on CS terminates pro-
gramming mode.
A logic high on CS enables OUT and serial commu-
nication (see Communication Protocol section).
WE controls the refresh rate for the internal configura-
tion and DAC registers from the EEPROM and enables
the erase/write operations. If communication has been
initiated (see Communication Protocol section), internal
register refresh is disabled.
A low on WE disables the erase/write operations and
also disables register refreshing from the EEPROM.
A high on WE selects a refresh rate of approximately
400 times per second and enables EEPROM
erase/write operations.
It is recommended that WE be connected to VSS
after the MAX1459 EEPROM has been programmed.
SCLK (Serial Clock)
SCLK must be driven externally and is used to input
commands to the MAX1459 or program the internal
EEPROM contents. Input data on DIO is latched on the
rising edge of SCLK.
2-Wire, 4–20mA
Smart Signal Conditioner
10
______________________________________________________________________________________
Table 4. EEPROM Memory Map
EE Address
Contents
EE Address
Contents
EE Address
Contents
EE Address
Contents
EE Address
Contents
Reserved
EE Address
Contents
EE Address
Contents
0E
0
0C
0
0F
0D
0
0A
08
0B
09
06
04
07
05
02
1
00
Configuration
03
01
1E
0
1C
1
1F
1D
0
1A
18
1B
19
16
14
17
15
12
1
10
MSB
Offset
LSB
13
11
2E
0
2C
0
2F
2D
1
2A
28
2B
29
26
24
27
25
22
1
20
MSB
Offset TC
LSB
23
21
3E
0
3C
1
3F
3D
1
3A
38
3B
39
36
34
37
35
32
1
30
MSB
FSO
LSB
33
31
4E
1
4C
0
4F
4D
0
4A
48
4B
49
46
44
47
45
42
1
40
MSB
FSOTC
LSB
43
41
6E
0
6C
0
6F
6D
0
6A
68
6B
69
66
64
67
65
62
0
60
User-Defined Bits
63
61
7E
0
7C
0
7F
7D
0
7A
78
7B
79
76
74
77
75
72
0
70
User-Defined Bits
73
71
Note: The MAX1459 processes the Reserved Bits in the EEPROM. If these bits are not properly programmed, the configuration
and DAC registers will not be updated correctly.
= Reserved Bits
51
53
50
0
52
55
57
54
56
59
5B
58
5A
0
5D
5F
0
5C
0
5E
Reserved
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