参数资料
型号: MAX14780EESA+
厂商: Maxim Integrated Products
文件页数: 9/14页
文件大小: 0K
描述: IC TXRX RS485/422 ESD 8SO
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
4
Maxim Integrated
+5.0V, ±30kV ESD-Protected, Fail-Safe,
Hot-Swap, RS-485/RS-422 Transceiver
MAX14780E
Note 1: All currents into the device are positive. All currents out of the device are negative. All voltages are referred to device
ground, unless otherwise noted.
Note 2: ΔVOD and ΔVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 3: The short-circuit output current applies to peak current just prior to foldback current limiting. The short-circuit foldback
output current applies during current limiting to allow a recovery from bus contention.
RECEIVER SWITCHING CHARACTERISTICS WITH INTERNAL SRL (500kbps)
(VCC = +5.0V ±10%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V and TA = +25NC.) (Note 1)
Test Circuits and Waveforms
Figure 1. Driver DC Test Load
Figure 2. Driver Timing Test Circuit
Figure 3. Driver Propagation Delays
B
A
VOD
VOC
RL/2
DI
DE
VCC
A
B
VOD
RL
CL
DI
VCC
0
Z
Y
VO
0
-VO
VO
VCC/2
tDPLH
tDPHL
1/2 VO
10%
tR
90%
1/2 VO
10%
tF
VDIFF = V (B) - V (A)
VDIFF
tSKEW = | tDPLH - tDPHL |
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Receiver Propagation Delay
tRPLH
CL = 15pF, Figures 6 and 7
200
ns
tRPHL
200
Receiver Output Skew
|tRPLH - tRPHL|
tRSKEW
CL = 15pF, Figures 6 and 7
30
ns
Maximum Data Rate
500
kbps
Receiver Enable to Output Low
tRZL
Figure 8
50
ns
Receiver Enable to Output High
tRZH
Figure 8
50
ns
Receiver Disable Time from Low
tRLZ
Figure 8
50
ns
Receiver Disable Time from High
tRHZ
Figure 8
50
ns
Receiver Enable from Shutdown
to Output High
tRZH(SHDN) Figure 8
5500
ns
Receiver Enable from Shutdown
to Output Low
tRZL(SHDN) Figure 8
5500
ns
Time to Shutdown
tSHDN
50
340
700
ns
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