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参数资料
| 型号： | MAX15023ETG/V+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 23/28页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 24WQFN |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 75 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 1MHz |
| 占空比： | 87.5% |
| 电源电压： | 4.5 V ~ 28 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 24-WFQFN 裸露焊盘 |
| 包装： | 管件 |
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MAX15023
Wide 4.5V to 28V Input, Dual-Output
Synchronous Buck Controller
To estimate the temperature rise of the die, use the fol-
lowing equation:
T J = T A + (P T x θ JA )
where θ JA is the junction-to-ambient thermal resistance
of the package, P T is power dissipated in the device,
and T A is the ambient temperature. The θ JA is 36°C/W
for the 24-pin TQFN package on multilayer boards, with
the conditions specified by the respective JEDEC stan-
dards (JESD51-5, JESD51-7). If actual operating condi-
tions significantly deviate from those described in the
JEDEC standards, then an accurate estimation of the
junction temperature requires a direct measurement of
the case temperature (T C ). Then, the junction tempera-
ture can be calculated using the following equation:
T J = T C + (P T x θ JC )
Use 3°C/W as θ JC thermal resistance for the 24-pin
TQFN package. The case-to-ambient thermal resis-
tance ( θ CA ) is dependent on how well the heat is trans-
ferred from the PCB to the ambient. Therefore, solder
the exposed pad of the TQFN package to a large cop-
per area to spread heat through the board surface,
minimizing the case-to-ambient thermal resistance. Use
large copper areas to keep the PCB temperature low.
Boost Flying-Capacitor Selection
The MAX15023 uses a bootstrap circuit to generate the
necessary gate-to-source voltage to turn on the high-
side MOSFET. The selected n-channel high-side MOS-
FET determines the appropriate boost capacitance
values (C BST_ in Typical Application Circuits) according
to the following equation:
Applications Information
PCB Layout Guidelines
Make the controller ground connections as follows: cre-
ate a small analog ground plane near the IC or use a
dedicated internal plane. Connect this plane to SGND
and use this plane for the ground connection for the IN
bypass capacitor, compensation components, feed-
back dividers, RT resistor, and LIM_ resistors.
If possible, place all power components on the top side
of the board, and run the power stage currents (espe-
cially the one having large high-frequency components)
using traces or copper fills on the top side only, without
adding vias.
On the top side, lay out a large PGND copper area for
the output of channels 1 and 2, and connect the bottom
terminals of the high-frequency input capacitors, output
capacitors, and the source terminals of the low-side
MOSFETs to that area.
Then, make a star connection of the SGND plane to the
top copper PGND area with few vias in the vicinity of
the source terminal sensing. Do not connect PGND and
SGND anywhere else. Refer to the MAX15023
Evaluation Kit data sheet for guidance.
Keep the power traces and load connections short,
especially at the ground terminals. This practice is
essential for high efficiency and jitter-free operation. Use
thick copper PCBs (2oz vs. 1oz) to enhance efficiency.
Place the controller IC adjacent to the synchronous rec-
tifier MOSFETs (NL_) and keep the connections for LX_,
PGND_, DH_, and DL_ short and wide. Use multiple
C BST _ =
Qg
? V BST _
small vias to route these signals from the top to the bot-
tom side. The gate current traces must be short and
wide, measuring 50 mils to 100 mils wide if the low-side
where Qg is the total gate charge of the high-side
MOSFET and ? V BST_ is the voltage variation allowed on
the high-side MOSFET driver after turn-on. Choose
? V BST_ such that the available gate drive voltage is not
significantly degraded (e.g., ? V BST_ = 100mV to
300mV) when determining C BST_ . The boost flying-
capacitor should be a low-ESR ceramic capacitor. A
minimum value of 100nF is recommended.
Maxim Integrated
MOSFET is 1in from the controller IC. Connect each
PGND trace from the IC close to the source terminal of
the respective low-side MOSFET.
Route high-speed switching nodes (BST_, LX_, DH_,
and DL_) away from the sensitive analog areas (RT,
COMP_, LIM_, and FB_). Group all SGND-referred and
feedback components close to the IC. Keep the FB_
and compensation network nets as small as possible to
prevent noise pickup.
23
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX15023EVKIT+ | 功能描述:电源管理IC开发工具 MAX15023 Eval Kit RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| MAX15024AATB/V+ | 制造商:Maxim Integrated Products 功能描述:- Rail/Tube |
| MAX15024AATB/V+T | 功能描述:功率驱动器IC Single Low Side RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| MAX15024AATB+ | 制造商:Maxim Integrated Products 功能描述:SINGLE/DUAL, 16NS, HIGH SINK/SOURCE CURRENT GATE DRIVERS - Rail/Tube |
| MAX15024AATB+T | 功能描述:功率驱动器IC Single Low Side RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
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