参数资料
型号: MAX15049EVKIT+
厂商: Maxim Integrated
文件页数: 31/31页
文件大小: 0K
描述: EVAL KIT FOR MAX15049
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 3,非隔离
输出电压: 1.2V,1.8V,3.3V
电流 - 输出: 6A,3A,3A
输入电压: 5 V ~ 16 V
稳压器拓扑结构: 降压
频率 - 开关: 500kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: MAX15049
MAX15048/MAX15049
Triple-Output Buck Controllers
with Tracking/Sequencing
PWM Controller
Applications Information
Power Dissipation
The 32-pin TQFN thermally enhanced package can
dissipate up to 2758.6mW. Calculate power dissipation
in the MAX15048/MAX15049 as a product of the input
voltage and the total REG output current (I REG ). I REG
includes quiescent current (I Q ) and the total gate-drive
current (I DREG ):
P D = V IN x I REG
I REG = I Q + [f SW x (Q G1 + Q G2
+ Q G3 + Q G4 + Q G5 + Q G6 )]
where Q G1 to Q G6 comprise the total gate charge of the
low-side and high-side external MOSFETs, f SW is the
switching frequency of the converter, and I Q is the qui-
escent current of the device at the switching frequency.
Use the following equation to calculate the maximum
power dissipation (P DMAX ) in the chip at a given ambient
temperature (T A ):
P DMAX = 34.5 x (150 - T A )mW
PCB Layout Guidelines
Use the following guidelines to lay out the switching volt-
age regulator:
1) Place the IN, REG, and DREG_ bypass capacitors
close to the MAX15048/MAX15049.
2) Minimize the area and length of the high-current
loops from the input capacitor, upper switching
MOSFET, inductor, and output capacitor back to the
input capacitor negative terminal.
Chip Information
PROCESS: BiCMOS
3) Keep the current loop formed by the lower switching
MOSFET, inductor, and output capacitor short.
4) Keep SGND and PGND_ isolated and connect them
at one single point close to the negative terminal of
the input filter capacitor.
5) Avoid long traces between the DREG_ bypass
capacitor, low-side driver outputs of the MAX15048/
MAX15049, MOSFET gate, and PGND_. Minimize
the loop formed by the DREG_ bypass capacitor,
bootstrap capacitor, high-side driver output of the
MAX15048/MAX15049, and upper MOSFET gates.
6) Place the bank of the output capacitors close to the
load.
7) Distribute the power components evenly across the
board for proper heat dissipation.
8) Provide sufficient copper area at and around the
switching MOSFETs and inductor to aid in thermal
dissipation.
9) Connect the MAX15048/MAX15049 exposed pad to
a large copper plane to maximize its power dissipa-
tion capability. Connect the exposed pad to SGND.
Do not connect the exposed pad to the SGND pin
directly underneath the IC.
10) Use 2oz copper to keep the trace inductance
and resistance to a minimum. Thin copper PCBs
can compromise efficiency since high currents are
involved in the application. Also, thicker copper
conducts heat more effectively, thereby reducing
thermal impedance.
Package Information
For the latest package outline information and land patterns, go
to www.maximintegrated.com/packages . Note that a “+”, “#”,
or “-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE
32 TQFN-EP
PACKAGE CODE
T3255+4
DOCUMENT NO.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
31
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2010 Maxim Integrated Products, Inc.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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