参数资料
型号: MAX15053AEWL+T
厂商: Maxim Integrated Products
文件页数: 14/21页
文件大小: 0K
描述: IC REG BUCK SYNC ADJ 2A 9WLP
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.6 V ~ 5.17 V
输入电压: 2.7 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 1MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: *
封装/外壳: *
包装: *
供应商设备封装: *
High-Efficiency, 2A, Current-Mode
Synchronous, Step-Down Switching Regulator
1 ? OUT
? V OUT =
× ? ? × ? R ESR_COUT +
f SW × L ?
8 × f SW × C OUT ?
V IN ? ?
R ESR_OUT <<
C OUT ?
R ESR_OUT >>
I SKIP ? LIMIT = IN OUT × t ON
capacitor’s ESL. Estimate the output-voltage ripple due
to the output capacitance, ESR, and ESL as follows:
V OUT ? V ? ? 1 ?
?
For ceramic capacitors, ESR contribution is negligible:
1
8 × f SW × C OUT
For tantalum or electrolytic capacitors, ESR contribution
is dominant:
1
8 × f SW × C OUT
Use these equations for initial output-capacitor selec-
tion. Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current is
a factor of the inductor value, the output-voltage ripple
decreases with larger inductance. Use ceramic capaci-
tors for low ESR and low ESL at the switching frequency
of the converter. The ripple voltage due to ESL is negli-
gible when using ceramic capacitors.
Load-transient response also depends on the selected
output capacitance. During a load transient, the output
instantly changes by ESR x D I LOAD . Before the controller
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time, the controller responds by regulating the output
voltage back to the predetermined value.
Use higher C OUT values for applications that require
light load operation or transition between heavy load and
light load, triggering skip mode, causing output under-
shooting or overshooting. When applying the load, limit
the output undershoot by sizing C OUT according to the
following formula:
? I LOAD
3f CO x ? V OUT
where D I LOAD is the total load change, f CO is the regula-
tor unity-gain bandwidth (or zero crossover frequency),
and D V OUT is the desired output undershooting. When
removing the load and entering skip mode, the device
cannot control output overshooting, since it has no sink
current capability; see the Skip Mode Frequency and
Output Ripple section to properly size C OUT .
Skip Mode Frequency and Output Ripple
In skip mode, the switching frequency (f SKIP ) and output
ripple voltage (V OUT-RIPPLE ) shown in Figure 2 are cal-
culated as follows:
t ON is a fixed time (300ns, typ); the peak inductor current
reached is:
V ? V
L
I L
I SKIP-LIMIT
I LOAD
t ON
t OFF1
t OFF2 = n × t CK
V OUT
V OUT-RIPPLE
Figure 2. Skip Mode Waveform
14
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