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参数资料
| 型号： | MAX15053AEWL+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 17/21页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2A 9WLP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 5.17 V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | * |
| 封装/外壳： | * |
| 包装： | * |
| 供应商设备封装： | * |
High-Efficiency, 2A, Current-Mode
Synchronous, Step-Down Switching Regulator
The effect of the inner current loop at higher frequen-
cies is modeled as a double-pole (complex conjugate)
The dominant poles and zeros of the transfer loop gain
are shown below:
G SAMPLING ( s ) =
s 2 s
+
π × f SW C
( π × f SW )
Q C =
f P1 =
? 1 ? K S × ( 1 ? D ) ? 0.5 ? ? ? 1
( f SW )
f P3 =
f Z1 =
frequency term, G SAMPLING (s), as shown:
1
2 × Q
where the sampling effect quality factor, Q C , is:
1
π × ? ? K S × ( 1 ? D ) ? 0.5 ? ?
And the resonant frequency is:
ω SAMPLING (s) = π × f SW
+ 1
f P2 =
g MV
2 π × 10 A VEA (dB)/20 × C C
1
2 π × C OUT ? + ? ?
? ?
? R LOAD f SW × L ?
1
2
1
2 π × C C R C
1
f Z2 =
2 π × C OUT ESR
f SAMPLING = SW
or:
f
2
Having defined the power modulator’s transfer function,
the total system transfer can be written as follows (see
Figure 3):
Gain(s) = G FF (s) × G EA (s) × G MOD (DC) × G FILTER (s) ×
G SAMPLING (s)
where:
The order of pole-zero occurrence is:
f P1 < f P2 ≤ f Z1 < f CO ≤ f P3 < f Z2
Under heavy load, f P2 , approaches f Z1 . Figure 3 shows
a graphical representation of the asymptotic system
closed-loop response, including dominant pole and zero
locations.
The loop response’s fourth asymptote (in bold, Figure 3)
is the one of interest in establishing the desired cross-
over frequency (and determining the compensation
G FF ( s ) =
R2
R1 + R2
×
( sC FF R1 + 1 )
? ? sC FF ( R1|| R2 ) + 1 ? ?
component values). A lower crossover frequency pro-
vides for stable closed-loop operation at the expense of
a slower load- and line-transient response. Increasing
G FF ( s ) =
R1 + R2
G EA ( s ) = 10 A VEA (dB)/20 ×
10 A VEA (dB)/20 ?
? sC C ? R C + ? + 1 ?
g MV
?
?
?
?
Leaving C FF empty, G FF(s) becomes:
R2
Also:
)
( sC C R C + 1
? ? ?
? ? ? ?
which simplifies to:
the crossover frequency improves the transient response
at the (potential) cost of system instability. A standard
rule of thumb sets the crossover frequency between
1/10 and 1/5 of the switching frequency. First, select
the passive power and decoupling components that
meet the application’s requirements. Then, choose the
small-signal compensation components to achieve the
desired clo sed-loop frequency response and phase
margin as outlined in the Closing the Loop: Designing
the Compensation Circuitry section .
? 10 A VEA (dB)/20 ?
? sC C ? ? + 1 ?
g MV
?
?
?
?
G EA ( s ) = 10 A VEA (dB)/20 ×
? ?
? ? ? ?
)
( sC C R C + 1
Closing the Loop: Designing the
Compensation Circuitry
1) Select the desired crossover frequency. Choose f CO
approximately 1/10 to 1/5 of the switching frequency
when R C <<
( sC OUT ESR + 1 )
G FILTER ( s ) = R LOAD ×
? K S × ( 1 ? D ) ? 0.5 ? ? ? ?
? ?
? sC
+ ?
?
f SW × L
? ? R LOAD
?
+ 1 ?
?
10 A VEA (dB)/20
g MV
?
?
OUT ? ?
? ?
1
? 1
?
?
?
(f SW ).
2) Determine R C by setting the system transfer’s fourth
asymptote gain equal to unity (assuming f CO > f Z1 ,
f P2 , and f P1 ) where:
______________________________________________________________________________________
17
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