参数资料
型号: MAX1515ETG+
厂商: Maxim Integrated Products
文件页数: 4/24页
文件大小: 0K
描述: IC REG DDR LV 24-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 75
应用: 转换器,DDR
输入电压: 1.3 V ~ 3.6 V
输出数: 2
输出电压: 0.5 V ~ 2.7 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-TQFN-EP(4x4)
包装: 管件
Low-Voltage, Internal Switch,
Step-Down/DDR Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V IN = +3.3V, V CC = V DD = SHDN = MODE = +3.3V, V REFIN = V REF , SKIP = GND, T A = 0°C to +85°C , unless oth-
erwise noted. Typical values are at T A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REFERENCE
T A = +25°C to
+85°C
1.0923
1.100
1.1077
Reference Voltage
V REF
V CC = +3.0V to +3.6V
T A = 0°C to
+85°C
1.0907
1.100
1.1094
V
Reference Load Regulation
I REF = -1μA to +50μA
10
mV
REFIN Input Voltage Range
V REFIN
V CC = +3.0V to +3.6V
0.5
1.5
V
REFOUT Output Accuracy
REFIN Input Bias Current
V REFIN -
V REFOUT
I REFIN
V REFIN = +0.5V to +1.5V
V REFIN = +0.5V to +1.5V
V REFIN = 1.1V
I REFOUT = -1mA
to +1mA
I REFOUT = -5mA
to +5mA
-10
-20
-50
+10
+20
+50
mV
nA
FAULT DETECTION
Thermal Shutdown
T SHDN
Rising, hysteresis = 15°C
+165
°C
Undervoltage-Lockout Threshold
PGOOD Trip Threshold (Lower)
PGOOD Trip Threshold (Upper)
PGOOD Propagation Delay
PGOOD Output Low Voltage
PGOOD Leakage Current
Condition
V CC(UVLO) V CC rising, 2% falling-edge hysteresis
No load, falling edge, hysteresis = 1%
No load, rising edge, hysteresis = 1%
FB forced 2% beyond PGOOD trip
t PGOOD
threshold
I SINK = 1mA
High state, forced to 3.6V; V CC = V DD = 3.6V
2.5
-13
+7
2.7
-10
+10
10
2.9
-7
+13
0.1
1
V
%
%
μs
V
μA
INPUTS AND OUTPUTS
Logic Input High Voltage
Logic Input Low Voltage
SKIP , SHDN , MODE, FBSEL0, FBSEL1
SKIP , SHDN , MODE, FBSEL0, FBSEL1
2.0
0.8
V
V
Logic Input Current
SKIP , SHDN , MODE, FBSEL0, FBSEL1
-0.5
+0.5
μA
4
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