参数资料
型号: MAX1515ETG+T
厂商: Maxim Integrated Products
文件页数: 19/24页
文件大小: 0K
描述: IC REG DDR LV 24-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 转换器,DDR
输入电压: 1.3 V ~ 3.6 V
输出数: 2
输出电压: 0.5 V ~ 2.7 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-WFQFN 裸露焊盘
供应商设备封装: 24-TQFN-EP(4x4)
包装: 带卷 (TR)
Low-Voltage, Internal Switch,
Step-Down/DDR Regulator
While sourcing current, V CHG and V DISCHG increase
with source load current and the voltage across the
inductor decreases. This causes the frequency to drop.
5mm from IN. Select the bulk input capacitor according
to the RMS input ripple-current requirements and volt-
age rating:
I RMS = I OUT ( MAX ) ?
?
?
Conversely, while sinking current, V CHG and V DISCHG
decrease with sink load current and the voltage across
the inductor increases. Approximate the change in fre-
quency with the following formula:
? V OUT ( V IN ? V OUT )
? V IN
?
?
?
Δ f PWM = ?
I OUT × R DROP
V IN × t OFF
Output Capacitor Selection
The output filter capacitor affects the output-voltage
ripple, output load-transient response, and feedback-
where R DROP is the resistance of the internal MOSFETs
(40m Ω typ) and the inductor.
Inductor Selection
loop stability. For stable operation, the MAX1515
requires a minimum output ripple voltage of V RIPPLE ≥
1% x V OUT . The minimum ESR of the output capacitor
is calculated by:
The key inductor parameters must be specified: induc-
tor value (L) and peak current (I PEAK ). The following
equation includes a constant, denoted as LIR, which is
the ratio of peak-to-peak inductor AC ripple current to
ESR ≥ 1 % ×
L
t OFF
maximum DC load current. A higher value of LIR allows
smaller inductance but results in higher losses and rip-
ple. A good compromise between size and losses is
found at approximately a 25% ripple-current to load-
Stable operation for source-only applications requires
the correct output filter capacitor. When choosing the
output capacitor, ensure that:
current ratio (LIR = 0.25), which corresponds to a peak
inductor current 1.125 times the DC load current:
C OUT ≥
V REFIN × t OFF
V OUT
× 105 μ F / μ s
L =
V OUT × t OFF
I OUT ( MAX ) × LIR
For DDR applications, the output capacitance require-
ment needs to be two times the above requirement.
The output filter capacitor must have low enough equiv-
Additionally, the minimum inductance chosen must be
high enough to limit the inductor current during the
high-side switch on-time to less than 1A/μs.
alent series resistance (ESR) to meet output ripple and
load-transient requirements, yet have high enough ESR
to satisfy stability requirements.
For applications where the output is subject to violent
L MIN ≥
( V IN ( MAX )
? V OUT
) ×
1 μ s
1 A
load transients, the output capacitor’s size depends on
how much ESR is needed to prevent the output from
dipping too low under a load transient. Ignoring the sag
The peak-inductor current at full load is 1.125 x
I OUT(MAX) if the above equation is used; otherwise, the
due to finite capacitance:
R ESR ≤
peak current is calculated by:
I PEAK = I OUT ( MAX ) +
V OUT × t OFF
2 × L
V STEP
Δ I OUT ( MAX )
In applications without large and fast load transients,
the output capacitor’s size often depends on how much
Choose an inductor with a saturation current at least as
high as the peak-inductor current. The inductor select-
ed should exhibit low losses at the chosen operating
frequency.
Input Capacitor Selection
ESR is needed to maintain an acceptable level of out-
put voltage ripple. The output ripple voltage of a step-
down controller equals the total inductor ripple current
multiplied by the output capacitor’s ESR. Therefore, the
maximum ESR required to meet ripple specifications is:
The input-filter capacitors reduce peak currents and
noise at the voltage source. Place a low-ESR and low-
ESL 0.1μF capacitor for noise filtering no further than
R ESR ≤
V RIPPLE
I OUT ( MAX ) LIR
______________________________________________________________________________________
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