参数资料
型号: MAX16125WTEJ00+T
厂商: Maxim Integrated Products
文件页数: 7/16页
文件大小: 0K
描述: IC PUSH BUTTON CTRLR 6WLP
标准包装: 2,500
类型: 监控器
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 172.8 ms
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 6-WFBGA,WLPBGA
供应商设备封装: 6-WLP (1.24x.84)
包装: 带卷 (TR)
MAX16122–MAX16125
Dual Pushbutton Controllers in
Tiny 6-Bump WLP Package
Bump Description (continued)
BUMP
MAX16122/
MAX16123
C1
C2
B2
A2
MAX16124/
MAX16125
C1
C2
NAME
V CC
GND
MR1
MR2
FUNCTION
Power-Supply Input. V CC provides power to the device and is also a monitored
voltage. When V CC drops below the selected threshold, RESET asserts low and
remains low for the reset timeout period after V CC rises above the threshold. Bypass
V CC to GND with a 0.1 F F capacitor.
Ground
Active-Low Manual Reset Input 1. Internal 50k I pullup to V CC . Pull both MR1 and MR2
low for the setup delay (t SU ) to one-shot pulse RESET for the reset timeout period.
Active-Low Manual Reset Input 2. Internal 50k I pullup to V CC . Pull the MR2 and MR1
low for the setup delay (t SU ) to one-shot pulse RESET for the reset timeout period.
t SU =
Detailed Description
The MAX16122–MAX16125 low-current microprocessor
reset circuits feature single or dual manual reset inputs
with an extended setup period. The devices also feature
an internal comparator to monitor 5V, 3.3V, 2.5V, and
1.8V supplies.
When the monitored supply voltage drops below the
specified threshold, the active-low RESET output asserts
low and remains low for the reset timeout period (t RP ).
The RESET output is one-shot pulse asserted for the
reset timeout period. Supply voltage reset threshold is
selectable through part suffix, see Table 3 .
Connect SEL to GND, V CC , or leave unconnected to
select the different setup delays (depending on part suf-
fix, see Table 1a ) , or connect to an external resistor to set
the setup delays (E suffix only, see Table 1b ).
The MAX16124/MAX16125 have one manual reset input
( MR ), one reset output ( RESET ), and one soft reset output
( SRESET ). The MAX16122/MAX16123 have two identical
manual reset inputs ( MR1 and MR2 ) and one reset output
( RESET ). A deglitch block is connected to each manual
reset input to add a delay to the falling edge with a fixed
deglitch period of 20ms (t DB ).
Resistor-Adjusted Setup Delay
For the MAX16122–MAX16125 with the E setup delay
suffix (MAX1612_WTE_+T), a resistor connected from
SEL to GND sets the setup delay. Table 1b shows com-
mon resistor values and the resulting setup delays. For
resistor values not in the table, use the following formula
to compute the setup delay:
R
20
where R is the resistor value in k I and t SU is the result-
ing setup delay in seconds. For best results, use resistor
values between 10k I and 500k I .
Reset Output
The reset output is typically connected to the reset
input of a microprocessor ( F P). A F P’s reset input starts
or restarts the F P in a known state. The MAX16122–
MAX16125 F P supervisory circuits provide the reset
logic to prevent code-execution errors during power-up,
power-down, and brownout conditions (see the Typical
The MAX16122/MAX16123 have a reset output RESET .
The MAX16124/MAX16125 have a reset output RESET
and a soft-reset output SRESET which is the debounced
“mirror image” of MR (see Figure 1a ).
7
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