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参数资料
| 型号： | MAX1621EEE+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 18/20页 |
| 文件大小： | 0K |
| 描述： | IC TEMP SENSOR W/ALARM 16QSOP |
| 标准包装： | 2,500 |
| 应用： | LCD 显示器 |
| 电流 - 电源： | 150µA |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
Digitally Adjustable LCD Bias Supplies
Diode Selection
The high maximum switching frequency of 300kHz
requires a high-speed rectifier. Schottky diodes, such as
the MBRS0540, are recommended. To maintain high effi-
ciency, the average current rating of the Schottky diode
must be greater than the peak switching current. Choose
a reverse breakdown voltage greater than the positive
output voltage or greater than the negative output volt-
age plus V BATT .
External Switching Transistor
Again, the high maximum switching frequency requires
a high-speed switching transistor to maintain efficiency.
Logic-level N-channel MOSFETs, such as the
MMFT3055VL, are recommended (N1). Choose a V DS
rating greater than the positive output voltage or
greater than the negative output voltage plus V BATT .
To save cost in certain applications, a bipolar transistor
may be substituted for the MOSFET with a decrease in
efficiency. The conditions favoring substitution are limit-
ed input voltage range (V DD ), low maximum battery
voltage (V BATT ), and low output current. For example,
V DD = 3.0V to 3.6V, V BATT,MAX = 12V, and I OUT = 5mA
favors a bipolar transistor substitution to reduce cost.
To modify the Typical Operating Circuit (Figures 4 and
5) for a bipolar switching transistor, connect the collec-
tor to the inductor, the base to DLO, and the emitter to
PGND (Figure 10). Connect the base to DHI through a
series resistor to limit the base current. Choose the
resistor such that the minimum base current is greater
than 1/20 of the peak inductor current. For example,
assume V DD,MIN = 3V and I PK = 100mA; then R S ≤ 20 x
(3 - 0.7) / 100mA = 460 ? .
Output Filter Capacitor
A 22μF, 35V, low-ESR, surface-mount tantalum output
capacitor is sufficient for most applications. Output rip-
ple voltage is dominated by the peak switch current
multiplied by the output capacitor’s effective series
resistance (ESR). 100mVp-p output ripple is a good tar-
get for the trade-off between cost and performance.
Capacitors smaller than 22μF may be used for light
loads and lower peak current. Surface-mount capaci-
tors are generally preferred because they lack the
inductance and resistance of their through-hole equiva-
lents. The AVX TPS series and the Sprague 593D and
595D series are good choices for low-ESR surface-
mount tantalum capacitors.
Moderate-performance aluminum-electrolytic or tanta-
lum capacitors can be successfully substituted in cost-
sensitive applications with low output current. Matsuo
and Nichicon provide suitable choices.
Input Bypass Capacitor
Two inputs, V DD and V BATT , require bypass capacitors.
Bypass V DD with a 0.1μF ceramic capacitor as close to
the IC as possible. The battery supplies high currents
to the inductor and requires local bulk bypassing close
to the inductor. A 22μF low-ESR surface-mount capaci-
tor is sufficient for most applications. Smaller capaci-
tors are acceptable if peak inductor current is low or
the battery’s internal impedance is low and the battery
is close to the inductor.
Charge-Pump Capacitor (Negative Output)
Possible negative output topologies are shown in
Figures 5 and 6. Overall efficiency for the negative out-
put configuration is less than for the positive output
circuit because of the extra components in the power-
transfer path. For efficient charge transfer, C4 must
have low ESR and should be smaller than the output
capacitor (C5). C4 sees the same voltage as C5, and
should have the same voltage rating. A 1μF ceramic
capacitor is a practical choice for cost and performance
considerations. 2.2μF is suggested for Figure 6’s circuit.
Feedback-Compensation Capacitor
The high value of the feedback resistors (R3, R4, R5,
Figure 4) makes the feedback loop susceptible to
phase lag because of the parasitic capacitance at the
FB pin. To compensate for this, connect a capacitor
(C6, Figure 4) in parallel with R5. The value of C6
depends on the parallel combination of R3, R4, R5, and
the individual circuit layout. Typical values range from
33pF to 220pF.
Reference-Compensation Capacitor
The internal reference uses an external capacitor for
frequency compensation. Connect a ceramic capacitor
with a 0.1μF minimum value between REF and ground.
PC Board Layout and Grounding
Due to high current levels and fast switching wave-
forms, proper PC board layout is essential. In particu-
lar, keep all traces short, especially those connected to
the FB pin and those connecting N1, L1, D1, D2, C4,
and C5. Place R3, R4, and R5 as close to the feedback
pin as possible.
Use a star ground configuration: connect the grounds
of the input bypass capacitor, the output capacitor, and
the switching transistor together, close to the IC ’s
PGND pin. Tie AGND and PGND together at the chip.
18
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