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参数资料
| 型号： | MAX1672EEE-T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/11页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BOOST FIX/ADJ 16QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 两者兼有 |
| 输出数： | 1 |
| 输出电压： | 3.3V，5V，可调 |
| 输入电压： | 1.8 V ~ 11 V |
| 电流 - 输出： | 300mA |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-QSOP |
Step-Up/Down DC-DC Converter
in QSOP Package
Typical Operating Characteristics (continued)
(T A = +25°C, unless otherwise noted.)
OUTPUT RIPPLE (HEAVY LOAD)
MAX1672-13
STARTUP DELAY
MAX1672-14
TURN-OFF DELAY
MAX1672-15
A
A
A
B
B
B
10 μ s/div
A: V OUT = 5V (20mV/div, AC COUPLED)
B: I L1 (500mA/div) (V IN = 2.7V, I OUT = 250mA)
50 μ s/div
A: V OUT = (2V/div)
B: ONB (2V/div) (V IN = 2.7V, R LOAD = 50 ? )
200 μ s/div
A: V OUT = (2V/div)
B: ONB (2V/div) (V IN = 2.7V, R LOAD = 50 ? )
______________________________________________________________Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
LX
PGND
ONB
ONA
3/ 5
PGI
PGO
ILIM
OUT
FB
PS
IN
REF
GND
PGND
LX
FUNCTION
Inductor Connection to the Drain of the Internal N-Channel Power MOSFET
Power Ground
On Control Input. When ONB = low or ONA = high, the IC is on. Connect ONB to GND for normal operation
(Table 1).
On Control Input. When ONA = low and ONB = high, the IC is off. Connect ONA to PS for normal operation
(Table 1).
Output Voltage Selection Input. Connect to PS for 3.3V output and to GND for 5V output. With V FB > 80mV,
the state of the 3/ 5 pin is ignored (Table 2).
Low-Battery Detector Input (1.25V threshold)
Low-Battery Detector Output (open drain). PGO pulls low when V PGI is greater than 1.25V.
Inductor-Current-Limit Selection Input. Connect to PS for 0.8A current limit and to GND for 0.5A current limit.
Regulator Output. Drain of internal PFET linear regulator. Bypass with a 4.7μF capacitor to GND.
Feedback Input. For 3.3V or 5V output, connect to GND. For adjustable output, connect to feedback resistor-
divider network. With V FB > 70mV, the state of the 3/ 5 pin is ignored.
Bootstrapped Power Supply. Output of step-up switch-mode regulator and source of internal PFET linear
regulator. The IC is powered from this pin.
Input Voltage Sense Input. Connect to input supply.
Reference Voltage Output. Bypass with a 0.1μF capacitor to GND.
Analog Ground
Power Ground
Inductor Connection to the Drain of the Internal N-Channel Power MOSFET
_______________________________________________________________________________________
5
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