参数资料
型号: MAX16974AUE/V+
厂商: Maxim Integrated Products
文件页数: 17/19页
文件大小: 0K
描述: IC REG BUCK SYNC 5V/ADJ 16TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 96
类型: 降压(降压)
输出类型: 两者兼有
输出数: 1
输出电压: 5V,1 V ~ 10 V
输入电压: 3.5 V ~ 28 V
PWM 型: 电流模式
频率 - 开关: 260kHz ~ 2.2MHz
电流 - 输出: 2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
包装: 管件
供应商设备封装: 16-TSSOP-EP
High-Voltage, 2.2MHz, 2A Automotive Step-
Down Converter with Low Operating Current
GAIN MOD(fC) ×
× GAIN EA(fC) = 1
GAIN EA(fC) m,EA C × zMOD
= g
× R
× g m,EA C × zMOD = 1
GAIN MOD(fC) ×
× R
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error amplifier
gain at f C should be equal to 1. So:
V FB
V OUT
For_the_case_where_f zMOD _is_greater_than_f C :
GAIN EA(fC) = g m,EA × R C
The error-amplifier gain at f C is:
Therefore:
V OUT f C
Solving for R C :
f
f C
V FB f
GAIN MOD(fC) = GAIN MOD(DC) ×
f pMOD
f C
R C =
g m,EA × V FB × GAIN MOD(fC) × f zMOD
V OUT × f C
GAIN MOD(fC) × × g m,EA C = 1
V FB
C C =
Therefore:
Solving for R C :
V OUT
× R
Set the error-amplifier compensation zero formed by R C
and C C at the f pMOD (f zEA = f pMOD ):
1
2 π × f pMOD × R C
R C =
V OUT
g m,EA × V FB × GAIN MOD(fC)
If f zMOD is less than 5 O  f C , add a second capacitor, C F ,
from COMP to GND. Set f pEA = f zMOD and calculate C F
as follows:
Set the error-amplifier compensation zero formed by R C
and C C (f zEA ) at the f pMOD . Calculate the value of C C
as follows:
C F =
1
2 π × f zMOD × R C
C C =
1
2 π × f pMOD × R C
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer
If f zMOD is less than 5 x f C , add a second capacitor,
C F , from COMP to GND and set the compensation pole
formed by R C and C F (f pEA ) at the f zMOD . Calculate the
value of C F as follows:
board whenever possible for better noise immunity and
power dissipation. Follow these guidelines for good PCB
layout:
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating compo-
C F =
1
2 π × f zMOD × R C
nents have adequate cooling. The bottom pad of the
device must be soldered down to this copper plane
for effective heat dissipation and getting the full
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
For_the_case_where_f zMOD _is_less_than_f C :
The power-modulator gain at f C is:
power out of the IC. Use multiple vias or a single large
via in this plane for heat dissipation.
2) Isolate the power components and high-current path
from the sensitive analog circuitry. This is essential to
prevent any noise coupling into the analog signals.
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
GAIN MOD(fC) = GAIN MOD(DC) ×
f pMOD
f zMOD
jitter-free operation. The high-current path composed
of input capacitor, high-side FET, inductor, and the
output capacitor should be as short as possible.
_______________________________________________________________________________________ _ 17
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