参数资料
型号: MAX17014ETM+T
厂商: Maxim Integrated Products
文件页数: 15/33页
文件大小: 0K
描述: IC PWR SUPPLY MULT-OUTPUT 48TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: LCD 电视机/监控器
电流 - 电源: 8mA
电源电压: 8 V ~ 16.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 48-WFQFN 裸露焊盘
供应商设备封装: 48-TQFN-EP(7x7)
包装: 带卷 (TR)
Low-Cost Multiple-Output
Power Supply for LCD TVs
Pin Description (continued)
PIN
23, 24
25, 26
27
28
29
30
31
32
33
35, 36
37, 38
39
40
41
42
43
44
45
46
47
48
EP
NAME
LX2
IN2
V IN
FSEL
DEL2
VL
COMP
EN2
EN1
GND1
LX1
SWI
SUI
FB1
SWO
OVIN
NEG2
POS2
OUT2
OGND
NEG1
GND
FUNCTION
Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET
connected between IN2 and LX2. Connect the inductor and Schottky catch diode close to both LX2
pins to minimize the trace area for low EMI.
Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between IN2
and LX2.
Input of the Internal 5V Linear Regulator and the Startup Circuitry. Bypass V IN to GND with 0.22 μF
close to the IC.
Frequency-Select Pin. Connect FSEL to GND for 600kHz operation. Connect to VL or V IN for 1.2MHz
operation.
Step-Up Regulator and Positive Charge-Pump Delay Input. Connect a capacitor from DEL2 and
GND to set the delay time between EN2 and the startup of these regulators, or between the step-
down startup and the startup of these regulators if EN1 is high before the step-down starts. An 8 μA
current source charges C DEL2 . DEL2 is internally pulled to GND through 10
resistance when EN1
or EN2 is low or when VL is below its UVLO threshold.
5V Internal Linear Regulator Output. Bypass VL to GND with 1μF minimum. Provides power for the
internal MOSFET driving circuit, the PWM controllers, charge-pump regulators, logic, and reference
and other analog circuitry. Provides 25mA load current when all switching regulators are enabled.
VL is active whenever V IN is above V IN UVLO threshold.
Compensation Pin for the Step-Up Error Amplifier. Connect a series resistor and capacitor from
COMP to ground.
Step-Up and Positive Charge-Pump Regulator Enable Input. Input HIGH also enables DEL2 pullup
current. EN2 is inactive when EN1 is low. See the Power-Up Sequence section for details.
Step-Down and Negative Charge-Pump Regulator Enable Input. Input HIGH also enables DEL1
pullup current.
Step-Up Regulator Power Ground. Source of the internal power n-channel MOSFET.
Step-Up Regulator Power MOSFET n-Channel Drain and Switching Node. Connect the inductor and
Schottky catch diode to both LX1 pins and minimize the trace area for lowest EMI.
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Source Input. Connect to the cathode of
the step-up regulator Schottky catch diode.
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Gate Input. Connect a capacitor from
SUI to SWI to set the delay time. A 30 μA current source pulls down on C SUI when DEL2 is high.
Boost Regulator Feedback Input. Connect FB1 to the center of a resistive voltage-divider between
the boost regulator output and GND to set the boost regulator output voltage. Place the resistive
voltage-divider within 5mm of FB1.
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Drain Output
Operational Amplifier Power Input
Operational Amplifier 2 Inverting Input
Operational Amplifier 2 Noninverting Input
Operational Amplifier Output 2
Operational Amplifier Power Ground
Operational Amplifier 1 Inverting Input
Exposed Paddle = GND
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15
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