参数资料
型号: MAX17015EVKIT+
厂商: Maxim Integrated Products
文件页数: 18/24页
文件大小: 0K
描述: KIT EVAL FOR MAX17015
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
系列: *
1.2MHz Low-Cost,
High-Performance Chargers
If R ESR is small enough, its associated output zero has
a negligible effect near crossover and the loop-transfer-
Figure 8 shows the Bode plot of the voltage-loop-
frequency response using the values calculated above.
LTF = GM OUT ×
function can be simplified as follows:
R CC
sC OUT
G MV
MOSFET Drivers
The DHI and DLO outputs are optimized for driving
moderate-sized power MOSFETs. The MOSFET drive
capability is the same for both the low-side and high-
Setting LTF = 1 to solve for the unity-gain frequency
yields:
sides switches. This is consistent with the variable duty
factor that occurs in the notebook computer environ-
f CO _ CV = GM OUT × G MV ×
R CC
2 π × C OUT
ment where the battery voltage changes over a wide
range. There must be a low-resistance, low-inductance
path from the DLO driver to the MOSFET gate to pre-
For stability, choose a crossover frequency lower than
1/10 the switching frequency (f OSC) . For example,
choose a crossover frequency of 50kHz and solve for
R CC using the component values listed in Figure 1 to
yield R CC = 3k Ω :
vent shoot-through. Otherwise, the sense circuitry in the
MAX17005/MAX17006 interpret the MOSFET gate as
“off” while there is still charge left on the gate. Use very
short, wide traces measuring 10 to 20 squares or fewer
(1.25mm to 2.5mm wide if the MOSFET is 25mm from
the device). Unlike the DLO output, the DHI output uses
R CC =
2 π × C OUT × f CO _ CV
GMV × GM OUT
? 3 k Ω
a 50ns (typ) delay time to prevent the low-side MOSFET
from turning on until DHI is fully off. The same consider-
ations should be used for routing the DHI signal to the
GMV = 0.125μA/mV
GM OUT = 5A/V
C OUT = 4.7μF
f OSC_CV = 600kHz
R L = 0.2 Ω
f CO_CV = 50kHz
To ensure that the compensation zero adequately can-
cels the output pole, select f Z_CV ≤ f P_OUT :
C CC ≥ (R L /R CC ) x C OUT
C CC ≥ 300pF (assuming 2 cells and 2A maximum
charge current).
high-side MOSFET.
The high-side driver (DHI) swings from LX to 5V above
LX (BST) and has a typical impedance of 1.5 Ω sourcing
and 0.8 Ω sinking. The strong high-side MOSFET driver
eliminates most of the power dissipation due to switch-
ing losses. The low-side driver (DLO) swings from LDO
to ground and has a typical impedance of 3 Ω sinking
and 3 Ω sourcing. This helps prevent DLO from being
pulled up when the high-side switch turns on due to
capacitive coupling from the drain to the gate of the
low-side MOSFET. This places some restrictions on the
MOSFETs that can be used. Using a low-side
MOSFET with smaller gate-to-drain capacitance can
prevent these problems.
Design Procedure
80
60
40
20
0
0
-45
-90
MOSFET Selection
Choose the n-channel MOSFETs according to the maxi-
mum required charge current. The MOSFETs must be
able to dissipate the resistive losses plus the switching
losses at both V DCIN(MIN) and V DCIN(MAX) .
For the high-side MOSFET, the worst-case resistive
power losses occur at the maximum battery voltage
and minimum supply voltage:
-20
MAG
PHASE
PD COND ( HighSide ) =
V BATT ( MAX )
V DCIN ( MIN )
× I CHG 2 × R DS ( ON )
-40
-135
0.1
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 8. CC Loop Response
18
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