参数资料
型号: MAX17036GTL+
厂商: Maxim Integrated Products
文件页数: 15/39页
文件大小: 0K
描述: IC CTRLR VID QUICK-PWM 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
系列: Quick-PWM™
应用: 控制器,Intel IMVP-6.5? SV,XE
输入电压: 7 V ~ 26 V
输出数: 1
输出电压: 0.013 V ~ 1.5 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 管件
1/2/3-Phase Quick-PWM
IMVP-6.5 VID Controllers
Pin Description (continued)
PIN
20
21
22
23
24
25
26
27
28
29
30
31
32 –38
39
NAME
PWM3
BST2
LX2
DH2
DL2
VRHOT
V DD
DL1
DH1
LX1
BST1
PGD_IN
D0 –D6
CSP1
FUNCTION
PWM Signal Output for Phase 3. Swings from GND to V DD . Three-state whenever phase 3 is disabled
(in shutdown, when CSP3 is connected to V CC , and when operating with fewer than all phases).
Phase 2 Boost Flying Capacitor Connection. BST2 is the internal upper supply rail for the DH2 high-
side gate driver. An internal switch between V DD and BST2 charges the BST2-LX2 flying capacitor
while the low-side MOSFET is on (DL2 pulled high).
Phase 2 Inductor Connection. LX2 is the internal lower supply rail for the DH2 high-side gate driver.
Also used as an input to phase 2 ’s zero-crossing comparator.
Phase 2 High-Side Gate-Driver Output. DH2 swings from LX2 to BST2. Low in shutdown.
Phase 2 Low-Side Gate-Driver Output. DL2 swings from GND to V DD . DL2 is forced low in shutdown.
DL2 is forced high when an output overvoltage fault is detected, overriding any negative current-
limit condition that might be present. DL2 is forced low in skip mode after detecting an inductor
current zero crossing.
Open-Drain Output of Internal Comparator. VRHOT is pulled low when the voltage at THRM goes
below 1.5V (30% of V CC ). VRHOT is high impedance in shutdown.
Supply Voltage Input for the DL_ Drivers. V DD is also the supply voltage used to internally recharge
the BST_-LX_ flying capacitor during the times the respective DL_s are high. Connect V DD to the
4.5V to 5.5V system supply voltage. Bypass V DD to GND with a 1μF or greater ceramic capacitor.
Phase 1 Low-Side Gate-Driver Output. DL1 swings from GND to V DD . DL1 is forced low in shutdown.
DL1 is forced high when an output overvoltage fault is detected, overriding any negative current-
limit condition that might be present. DL1 is forced low in skip mode after detecting an inductor
current zero crossing.
Phase 1 High-Side Gate-Driver Output. DH1 swings from LX1 to BST1. Low in shutdown.
Phase 1 Inductor Connection. LX1 is the internal lower supply rail for the DH1 high-side gate driver.
Also used as an input to phase 1 ’s zero-crossing comparator.
Phase 1 Boost Flying Capacitor Connection. BST1 is the internal upper supply rail for the DH1 high-
side gate driver. An internal switch between V DD and BST1 charges the BST1-LX1 flying capacitor
while the low-side MOSFET is on (DL1 pulled high).
Power-Good Logic Input Pin that Indicates the Power Status of Other System Rails and Used for Supply
Sequencing. During startup, after soft-starting to the boot voltage, the output voltage remains at V BOOT ,
and the CLKEN and PWRGD outputs remain high and low, respectively, as long as the PGD_IN input
stays low. When PGD_IN later goes high, the output is allowed to transition to the voltage set by the VID
code, and CLKEN is allowed to go low. During normal operation, if PGD_IN goes low, the controller
immediately forces CLKEN high and PWRGD low, and slews the output to the boot voltage while in skip
mode at 1/4 the normal slew rate set by the TIME resistor. The output then stays at the boot voltage until
the controller is turned off or power cycled, or until PGD_IN goes high again.
Low-Voltage (1.0V Logic) VID DAC Code Inputs. The D0 –D6 inputs do not have internal pullups. These
1.0V logic inputs are designed to interface directly with the CPU. The output voltage is set by the VID
code indicated by the logic-level voltages on D0 –D6 (see Table 4).
The 1111111 code corresponds to a shutdown mode. When this code is detected, The
MAX17030/MAX17036 initiate a soft-shutdown transition identical to the shutdown transition for a
SHDN falling edge. After slewing the output to 0V, it forces DH_, DL_, and DRSKP low, and three-states
PWM3. The IC remains active and its V CC quiescent current consumption stays the same as in normal
operation. If D6 –D0 is changed from 1111111 to a different code, the MAX17030/MAX17036 initiate a
startup sequence identical to the startup sequence for a SHDN rising edge.
Positive Input of the Output Current Sense of Phase 1. This pin should be connected to the positive
side of the output current-sensing resistor or the filtering capacitor if the DC resistance of the output
inductor is utilized for current sensing.
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