参数资料
型号: MAX17036GTL+
厂商: Maxim Integrated Products
文件页数: 36/39页
文件大小: 0K
描述: IC CTRLR VID QUICK-PWM 40-TQFN
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 60
系列: Quick-PWM™
应用: 控制器,Intel IMVP-6.5? SV,XE
输入电压: 7 V ~ 26 V
输出数: 1
输出电压: 0.013 V ~ 1.5 V
工作温度: 0°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘
供应商设备封装: 40-TQFN-EP(5x5)
包装: 管件
1/2/3-Phase Quick-PWM
IMVP-6.5 VID Controllers
The optimum high-side MOSFET trades the switching
losses with the conduction (R DS(ON) ) losses over the
input voltage range. Ideally, the losses at V IN(MIN)
should be roughly equal to losses at V IN(MAX) , with
lower losses in between. If V IN does not vary over a
wide range, the minimum power dissipation occurs
where the resistive losses equal the switching losses.
where N is the number of high-side MOSFETs used for
one regulator, and Q GATE is the gate charge specified
in the MOSFET’s data sheet. For example, assume (1)
FDS6298 n-channel MOSFETs are used on the high
side. According to the manufacturer’s data sheet, a sin-
gle FDS6298 has a maximum gate charge of 19nC
(V GS = 5V). Using the above equation, the required
C BST =
Low-Side MOSFET Power Dissipation
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at maximum input voltage:
boost capacitance would be:
1 × 10nC
200 mV
= 0 . 05 μF
? V OUT ? ? ? I LOAD ? 2
? V IN ( MAX ) ? ? ? ? η TOTAL ?
? ?
I LOAD TOTAL ? I VALLEY ( MAX ) +
? Δ I INDUCTOR ?
? ?
?
= η TOTAL VALLEY ( MAX ) + ?
?
dV TARGET dt = 12 . 5 mV μs × ?
V LIMIT = TIME ILIM
?
PD (NL Resistive) = ? 1 ? ? ? ? ? ? R DS ( ON )
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than I LOAD(MAX)
but are not quite high enough to exceed the current limit
and cause the fault latch to trip. To protect against this
possibility, the circuit can be overdesigned to tolerate:
= η
2
? I LOAD(MAX ) LIR ?
I
? 2 ?
where I VALLEY(MAX) is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-size heatsink to handle the overload
power dissipation.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R DS(ON) ), comes in a moderate-sized
package (i.e., one or two thermally enhanced 8-pin SOs),
and is reasonably priced. Make sure that the DL gate dri-
ver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-to-
drain capacitor caused by the high-side MOSFET turning
on; otherwise, cross-conduction problems might occur
(see the MOSFET Gate Drivers section).
The optional Schottky diode (D L ) should have a low for-
ward voltage and be able to handle the load current
per phase during the dead times.
Boost Capacitors
The boost capacitors (C BST ) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Select the boost capacitors to
avoid discharging the capacitor more than 200mV while
Selecting the closest standard value; this example
requires a 0.1μF ceramic capacitor.
Current Limit and Slew-Rate Control
(TIME and ILIM)
TIME and ILIM are used to control the slew rate and
current limit. TIME regulates to a fixed 2.0V. The
MAX17030/MAX17036 use the TIME source current to
set the slew rate (dV TARGET /dt). The higher the source
current, the faster the output-voltage slew rate:
? 71.5k Ω ?
? R TIME ? ?
where R TIME is the sum of resistance values between
TIME and ground.
The ILIM voltage determines the valley current-sense
threshold. When ILIM = V CC , the controller uses the
22.5mV preset current-limit threshold. In an adjustable
design, ILIM is connected to a resistive voltage-
divider connected between TIME and ground. The dif-
ferential voltage between TIME and ILIM sets the cur-
rent-limit threshold (V LIMIT ), so the valley current-sense
threshold:
V ? V
10
This allows design flexibility since the DCR sense circuit
or sense resistor does not have to be adjusted to meet
the current limit as long as the current-sense voltage
never exceeds 50mV. Keeping V LIMIT between 20mV to
40mV leaves room for future current-limit adjustment.
The minimum current-limit threshold must be high
enough to support the maximum load current when the
current limit is at the minimum tolerance value. The val-
ley of the inductor current occurs at I LOAD(MAX) minus
half the ripple current; therefore:
N × Q GATE
C BST =
I VALLEY > I LOAD ( MAX ) ? 1 ?
2 ?
charging the high-side MOSFETs’ gates:
200 mV
?
?
LIR ?
?
36
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MAX17039GTN+T 功能描述:电压模式 PWM 控制器 Dual-Out 3-Phase + 1 Phase Quick-PWM RoHS:否 制造商:Texas Instruments 输出端数量:1 拓扑结构:Buck 输出电压:34 V 输出电流: 开关频率: 工作电源电压:4.5 V to 5.5 V 电源电流:600 uA 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装 / 箱体:WSON-8 封装:Reel