参数资料
型号: MAX1708EEE+T
厂商: Maxim Integrated Products
文件页数: 10/14页
文件大小: 0K
描述: IC REG BST 3.3V/5V/ADJ 5A 16QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 升压(升压)
输出类型: 两者兼有
输出数: 1
输出电压: 3.3V,5V,可调
输入电压: 0.7 V ~ 5 V
PWM 型: 电流模式
频率 - 开关: 600kHz
电流 - 输出: 5A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 16-QSOP
High-Frequency, High-Power, Low-Noise,
Step-Up DC-DC Converter
Table 1. On/Off Logic Control
Table 2. Selecting Switching Frequency
ONA
0
0
1
1
ONB
0
1
0
1
MAX1708
On
Off
On
On
CLK
0
1
External clock
(350kHz ? 1000kHz)
MODE
Not allowed
PWM
Synchronized PWM
OUT
IC POWER
UNDERVOLTAGE LOCKOUT
MAX1708
PWM
2.15V
EN
STARTUP
OSCILLATOR
Q
D
CONTROLLER
ONA
ONB
REF
CLK
1.26V
ON RDY
REFERENCE
EN
600kHz
OSCILLATOR
EN
OSC
N
LX
FB
3.3/5
GND
DUAL MODE
FB
OUT
FB
PGND
Figure 2. Simplified Functional Diagram
R 4 = R 3 ? OUT ? 1 ?
troller  functional  diagram.  The  MAX1708  enters  syn-
chronized current-mode PWM when a clock signal
(350kHz < f CLK < 1MHz) is applied to CLK. For wire-
less or noise-sensitive applications, this ensures that
switching harmonics are predictable and kept outside
the IF frequency band(s). High-frequency operation
permits low-magnitude output ripple voltage and mini-
mum inductor and filter capacitor size. Switching loss-
es will increase at higher frequencies (see MAX1708 IC
Power Dissipation).
Setting the Output Voltage
The MAX1708 features Dual Mode? operation. When
FB is connected to ground, the MAX1708 generates a
fixed output voltage of either 3.3V or 5V, depending on
the logic applied to the 3.3/5 input (Figure 1). The out-
put can be configured for other voltages, using two
external resistors as shown in Figure 4. To set the out-
put voltage externally, choose an R3 value that is large
enough to minimize load at the output but small enough
? V ?
? V FB ?
where V FB = 1.24V.
Soft-Start/Current Limit Adjustment
(SS/LIM)
The soft-start pin allows the soft-start time to be adjust-
ed by connecting a capacitor from SS/LIM to GND.
Select capacitor C3 (see Figure 1):
t SS = 4ms + [110 ? C3 (in μF)]
where t SS is the time (in milliseconds) it takes output to
reach its final value.
To improve efficiency or reduce inductor size at
reduced load currents, the current limit can be reduced
from its nominal value (see Electrical Characteristics).
A resistor (R1 in Figure 1) between SS/LIM and ground
reduces the current limit as follows:
to minimize errors due to leakage and the time constant
to FB. A value of R4 ≤ 50k Ω is required
R 1 = 312 k Ω ×
I 1
I LIM
Dual Mode is a trademark of Maxim Integrated Products.
where I 1 is the desired current limit in amperes and R1
≤ 312k Ω . I LIM = 5A, if R1 is omitted.
10
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