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| 型号： | MAX1715EEI |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 16/25页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 28-QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 50 |
| PWM 型： | 控制器 |
| 输出数： | 2 |
| 频率 - 最大： | 620kHz |
| 占空比： | 100% |
| 电源电压： | 4.5 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 包装： | 管件 |
Ultra-High Efficiency, Dual Step-Down
Controller for Notebook Computers
+5V
V IN
POR, UVLO, and Soft-Start
Power-on reset (POR) occurs when V CC rises above
MAX1715
BST
DH
LX
5 Ω
approximately 2V, resetting the fault latch and soft-start
counter and preparing the PWM for operation. V CC
undervoltage lockout (UVLO) circuitry inhibits switching
and forces the DL gate driver high (to enforce output
overvoltage protection) until V CC rises above 4.2V,
whereupon an internal digital soft-start timer begins to
ramp up the maximum allowed current limit. The ramp
occurs in five steps: 20%, 40%, 60%, 80%, and 100%;
100% current is available after 1.7ms ±50%.
A continuously adjustable analog soft-start function can
be realized by adding a capacitor in parallel with the
Figure 6. Reducing the Switching-Node Rise Time
place the IC close to the low-side MOSFET with short,
direct traces, making a Kelvin sense connection to the
source and drain terminals.
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving mod-
erate-size, high-side and larger, low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
V BATT - V OUT differential exists. An adaptive dead-time
circuit monitors the DL output and prevents the high-
side FET from turning on until DL is fully off. There must
be a low-resistance, low-inductance path from the DL
driver to the MOSFET gate for the adaptive dead-time
circuit to work properly. Otherwise, the sense circuitry
in the MAX1715 will interpret the MOSFET gate as “off”
while there is actually still charge left on the gate. Use
very short, wide traces measuring 10 to 20 squares (50
to 100 mils wide if the MOSFET is 1 inch from the
MAX1715).
The dead time at the other edge (DH turning off) is
determined by a fixed 35ns (typ) internal delay.
The internal pull-down transistor that drives DL low is
robust, with a 0.5 Ω typical on-resistance. This helps
prevent DL from being pulled up during the fast rise-
time of the inductor node, due to capacitive coupling
from the drain to the gate of the low-side synchronous-
rectifier MOSFET. However, for high-current applica-
tions, you might still encounter some combinations of
high- and low-side FETs that will cause excessive gate-
drain coupling, which can lead to efficiency-killing,
EMI-producing shoot-through currents. This is often
remedied by adding a resistor in series with BST,
which increases the turn-on time of the high-side FET
without degrading the turn-off time (Figure 6).
ILIM external resistor. This soft-start method requires a
minimum interval between power-down and power-up
to discharge the capacitor.
Power-Good Output (PGOOD)
The output voltage is continuously monitored for under-
voltage by the PGOOD comparator. In shutdown, soft-
start, and standby modes, PGOOD is actively held low.
After digital soft-start has terminated, PGOOD is
released if both the outputs are within 5.5% of the error
comparator threshold. The PGOOD output is a true
open-drain type with no parasitic ESD diodes. Note
that the PGOOD undervoltage detector is completely
independent of the output UVP fault detector.
Output Overvoltage Protection (OVP)
The overvoltage protection circuit is designed to pro-
tect against a shorted high-side MOSFET by drawing
high current and blowing the battery fuse. The output
voltage is continuously monitored for overvoltage. If the
output is more than 10.5% above the trip level of the
error amplifier, OVP is triggered and the circuit shuts
down. The DL low-side gate-driver output is then
latched high until SHDN is toggled or V CC power is
cycled below 1V. This action turns on the synchronous-
rectifier MOSFET with 100% duty and, in turn, rapidly
discharges the output filter capacitor and forces the
output to ground. If the condition that caused the over-
voltage (such as a shorted high-side MOSFET) per-
sists, the battery fuse will blow. DL is also kept high
continuously when V CC UVLO is active, as well as in
shutdown mode (Table 3).
Note that DL latching high causes the output voltage to
go slightly negative, due to energy stored in the output
LC at the instant OVP activates. If the load can’t toler-
ate being forced to a negative voltage, it may be desir-
able to place a power Schottky diode across the output
to act as a reverse-polarity clamp (Figure 1).
16
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1715EEI+ | 功能描述:DC/DC 开关控制器 Dual Step-Down Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1715EEI+T | 功能描述:DC/DC 开关控制器 Dual Step-Down Controller RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1715EEI-T | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1715EVKIT | 功能描述:DC/DC 开关控制器 Evaluation Kit for the MAX1715 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| MAX1716EEG | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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