参数资料
型号: MAX1715EEI
厂商: Maxim Integrated Products
文件页数: 3/25页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 28-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 50
PWM 型: 控制器
输出数: 2
频率 - 最大: 620kHz
占空比: 100%
电源电压: 4.5 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-SSOP(0.154",3.90mm 宽)
包装: 管件
Ultra-High Efficiency, Dual Step-Down
Controller for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, 4A components from Table 1, V CC = V DD = +5V, SKIP = AGND, V+ = 15V, T A = 0°C to +85°C , unless otherwise
noted.) (Note 1)
PARAMETER
Minimum Off-Time
Quiescent Battery Current (V+)
Quiescent Supply Current
(V CC + V DD )
Shutdown Supply Current
(V CC + V DD )
Shutdown Supply Current (V+)
Reference Voltage
Reference Load Regulation
CONDITIONS
(Note 3)
FB1 and FB2 forced above the regulation point
ON1 = ON2 = 0
ON1 = ON2 = 0
No external REF load
I REF = 0 to 50μA
MIN
1.98
TYP
400
25
1100
<1
<1
2
2
MAX
500
70
1600
5
5
2.02
0.01
UNITS
ns
μA
μA
μA
μA
V
V
REF Sink Current
REF Fault Lockout Voltage
REF in regulation
Falling edge, hysteresis = 40mV
10
1.6
μA
V
Overvoltage Trip Threshold
Overvoltage Fault Propagation
Delay
Output Undervoltage Threshold
Output Undervoltage Lockout
Time
Current-Limit Threshold
(Positive Direction, Fixed)
Current-Limit Threshold
(Positive Direction, Adjusted)
Current-Limit Threshold
(Negative Direction)
Current-Limit Threshold, Zero
Crossing
Thermal Shutdown Threshold
With respect to error comparator threshold
FB_ forced 2% above trip threshold
With respect to error comparator threshold
From ON_ signal going high
PGND - LX_, I LIM = V CC
PGND - LX_, I LIM resistor = 100k Ω
PGND - LX_, I LIM resistor = 400k Ω
PGND - LX_, T A = +25°C, I LIM = V CC
PGND - LX_, SKIP = AGND
Hysteresis = 10°C
8.5
60
10
75
40
160
-145
-5
10.5
1.5
70
20
100
50
200
-120
3
150
13
80
30
125
60
240
-95
10
%
μs
%
ms
mV
mV
mV
mV
°C
V CC Undervoltage Lockout
Threshold
DH Gate Driver On-Resistance
DL Gate Driver On-Resistance
(pull-up)
DL Gate Driver On-Resistance
(pull-down)
Rising edge, hysteresis = 20mV, PWM disabled below
this level
BST - LX forced to 5V
DL, high state
DL, low state
4.1
1.5
1.5
0.6
4.4
5
5
2.5
V
Ω
Ω
Ω
DH Gate Driver Source/Sink
Current
DL Gate Driver Source Current
DL Gate Driver Sink Current
Dead Time
Logic Input High Voltage
Logic Input Low Voltage
DH forced to 2.5V, BST_ - LX_ forced to 5V
DL forced to 2.5V
DL forced to 2.5V
DL rising
DH rising
ON_, SKIP
ON_, SKIP
2.4
1
1
3
35
26
0.8
A
A
A
ns
V
V
_______________________________________________________________________________________
3
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