参数资料
型号: MAX1775EEE-T
厂商: Maxim Integrated Products
文件页数: 9/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM 16-QSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
PWM 型: 控制器
输出数: 2
频率 - 最大: 1.25MHz
占空比: 100%
电源电压: 2.7 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
Dual-Output Step-Down
DC-DC Converter for PDA/Palmtop Computers
Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NAME
SHDNM
SHDNC
PGND
NDRV
CVL
IN
PDRV
CVH
REF
FBM
CS+
CS-
FBC
GND
INC
LXC
FUNCTION
Shutdown for Main Regulator. A low voltage on SHDNM shuts off the main output. For normal
operation, connect SHDNM to IN.
Shutdown for Core Regulator. A low voltage on SHDNC shuts off the core output. For normal operation,
connect SHDNC to CVL.
Power Ground. Ground for NDRV and core output synchronous rectifier. Connect all grounds together
close to the IC.
N-Channel Drive Output. Drives the main output synchronous rectifier MOSFET. NDRV swings between
CVL and PGND.
Low-Side Regulator Bypass. CVL is the output of an internal LDO regulator. This is the internal power
supply for the device control circuitry as well as the N-channel driver. Bypass CVL with a 1.0μF or
greater capacitor to GND. When CS- is above the CVL switchover threshold (2.47V), CVL is powered
from the main output.
Power Supply Input
P-Channel Drive Output. Drives the main output high-side MOSFET switch. PDRV swings between IN
and CVH. The voltage at CVH is regulated at V IN - 4.3V unless the input voltage is less than 5.5V.
High-Side Drive Bypass. CVH is the output of an internal LDO regulator with respect to V IN . This is the
low-side of the P-channel driver output. Bypass with a 1.0μF capacitor or greater to IN. When the input
voltage is less than +5.5V, CVH is switched to PGND.
Reference Voltage Output. Bypass REF to GND with a 0.22μF or greater capacitor.
Main Output Feedback. Connect FBM to a resistive voltage-divider to set main output voltage between
+1.25V to +5.5V.
Main Regulator High-Side Current-Sense Input. Connect the sense resistor between CS+ and CS-.
This voltage is used to set the current limit and to turn off the synchronous rectifier when the inductor
current approaches zero.
Main Regulator Low-Side Current-Sense Input. Connect CS- to the main output.
Core Output Feedback. Connect FBC to a resistive voltage-divider to set core output between +1.0V to
+5.0V.
Analog Ground
Core Supply Input
Core Converter Switching Node
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9
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