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| 型号： | MAX1777EEI+T |
| 厂商： | Maxim Integrated |
| 文件页数： | 24/32页 |
| 文件大小： | 0K |
| 描述： | IC REG QD BUCK/LINEAR 28QSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 拓扑： | 降压（降压）（2），线性（LDO）（2） |
| 功能： | 任何功能 |
| 输出数： | 4 |
| 频率 - 开关： | 200kHz ~ 500kHz |
| 电压/电流 - 输出 1： | 控制器 |
| 电压/电流 - 输出 2： | 控制器 |
| 电压/电流 - 输出 3： | 3.3V，100mA |
| 带 LED 驱动器： | 无 |
| 带监控器： | 无 |
| 带序列发生器： | 是 |
| 电源电压： | 4.5 V ~ 24 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 28-QSOP |
| 包装： | 带卷 (TR) |
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High-Efficiency, Quad Output, Main Power-
Supply Controllers for Notebook Computers
below 0.8V clears the overvoltage, undervoltage, and
thermal fault latches.
Adjustable-Output Feedback
(Dual-Mode FB)
Connect FB_ to GND to enable the fixed, preset SMPS
output voltages (3.3V and 5V). Connect a resistive volt-
age-divider at FB_ between OUT_ and GND to adjust
the respective output voltage between 2V and 5.5V
(Figure 11). Choose R2 to be about 10k ? and solve for
R1 using the equation:
Design Procedure
Establish the input voltage range and maximum load
current before choosing an inductor and its associated
ripple-current ratio (LIR). The following four factors dic-
tate the rest of the design:
1) Input Voltage Range. The maximum value (V+ (MAX) )
must accommodate the maximum AC adapter volt-
age. The minimum value (V+ (MIN) ) must account for
the lowest input voltage after drops due to connec-
tors, fuses, and battery selector switches. Lower input
? V
? 1 ?
?
? V OUT _
R 1 = R 2 × ?
? FB
?
?
voltages result in better efficiency.
2) Maximum Load Current. The peak load current
(I LOAD(MAX) ) determines the instantaneous compo-
nent stress and filtering requirements, and thus dri-
where V FB = 2V nominal.
When using the adjustable output mode, set the 3.3V
SMPS lower than the 5V SMPS. LDO5 connects to OUT5
through an internal switch only when OUT5 is above the
LDO5 bootstrap-switch threshold (4.56V). LDO3 con-
nects to OUT3 through an internal switch only when
OUT3 is above the LDO3 bootstrap switch threshold
(2.91V). Bootstrapping is most effective when the fixed
output voltages are used. Once LDO_ is bootstrapped
from OUT_, the internal linear regulator turns off. This
reduces internal power dissipation and improves effi-
ciency when LDO_ is powered with a high input voltage.
V+
DH_
V OUT_
MAX1777
ves output capacitor selection, inductor saturation
rating, and the design of the current-limit circuit.
The continuous load current (I LOAD ) determines the
thermal stress and drives the selection of input
capacitors, MOSFETs, and other critical heat-con-
tributing components.
3) Switching Frequency. This choice determines the
basic trade-off between size and efficiency. The
optimal frequency is largely a function of maximum
input voltage and MOSFET switching losses. The
MAX1777 has a nominal switching frequency of
200kHz for the 5V SMPS and 300kHz for the 3.3V
SMPS. The MAX1977 has a nominal switching fre-
quency of 400kHz for the 5V SMPS and 500kHz for
the 3.3V SMPS. The MAX1999 has pin-selectable
switching frequency.
4) Inductor Ripple Current Ratio (LIR). LIR is the
ratio of the peak-peak ripple current to the average
inductor current. Size and efficiency trade-offs must
be considered when setting the inductor ripple cur-
rent ratio. Low inductor values cause large ripple
currents, resulting in the smallest size, but poor effi-
ciency and high output noise. The minimum practi-
cal inductor value is one that causes the circuit to
MAX1977
MAX1999
DL_
GND
OUT_
FB_
R1
R2
operate at critical conduction (where the inductor
current just touches zero with every cycle at maxi-
mum load). Inductor values lower than this grant no
further size reduction benefit.
The MAX1777/MAX1977/MAX1999s’ pulse-skipping
algorithm ( SKIP = GND) initiates skip mode at the
critical conduction point. So the inductor’s operat-
ing point also determines the load current at which
PWM/PFM switchover occurs. The optimum point is
usually found between 20% and 50% ripple current.
Figure 11. Setting V OUT_ with a Resistor-Divider
24
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