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参数资料
| 型号： | MAX186DCPP+ |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 5/25页 |
| 文件大小： | 0K |
| 描述： | IC DAS 8CH 12BIT T/H LP 20-DIP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 18 |
| 类型： | 数据采集系统（DAS），ADC |
| 分辨率（位）： | 12 b |
| 采样率（每秒）： | 133k |
| 数据接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 电压电源： | 双 ± |
| 电源电压： | ±5V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 20-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 20-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 1393 (CN2011-ZH PDF) |
Internal Clock
In internal clock mode, the MAX186/MAX188 generate
their own conversion clock internally. This frees the
microprocessor from the burden of running the SAR con-
version clock, and allows the conversion results to be
read back at the processor’s convenience, at any clock
rate from zero to typically 10MHz. SSTRB goes low at the
start of the conversion and then goes high when the con-
version is complete. SSTRB will be low for a maximum of
10s, during which time SCLK should remain low for best
noise performance. An internal register stores data when
the conversion is in progress. SCLK clocks the data out
at this register at any time after the conversion is com-
plete. After SSTRB goes high, the next falling clock edge
will produce the MSB of the conversion at DOUT, fol-
lowed by the remaining bits in MSB-first format (see
Figure 9). CS does not need to be held low once a con-
version is started. Pulling CS high prevents data from
being clocked into the MAX186/MAX188 and three-
states DOUT, but it does not adversely effect an internal
clock-mode conversion already in progress. When inter-
nal clock mode is selected, SSTRB does not go into a
high-impedance state when CS goes high.
Figure 10 shows the SSTRB timing in internal clock
mode. In internal clock mode, data can be shifted in and
out of the MAX186/MAX188 at clock rates exceeding
4.0MHz, provided that the minimum acquisition time, tAZ,
is kept above 1.5s.
Low-Power, 8-Channel,
Serial 12-Bit ADCs
Maxim Integrated
13
MAX186/MAX188
tSDV
tSSTRB
PD0 CLOCKED IN
tSTR
SSTRB
SCLK
CS
tSSTRB
SSTRB
CS
SCLK
DIN
DOUT
14
8
12
18
20
24
START SEL2 SEL1 SEL0
UNI/
DIP
SCL/
DIFF
PD1
PD0
B11
MSB
B10
B9
B2
B1
B0
LSB
ACQUISITION
1.5
μs (CLK = 2MHz)
IDLE
FILLED WITH
ZEROS
IDLE
CONVERSION
10
μs MAX
A/D STATE
2
3
5
6
7
9
10
11
19
21
22
23
tCONV
Figure 8. External Clock Mode SSTRB Detailed Timing
Figure 9. Internal Clock Mode Timing
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX186DCPP+ | 功能描述:模数转换器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX186DCWP | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX186DCWP+ | 功能描述:模数转换器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX186DCWP+T | 功能描述:模数转换器 - ADC 12-Bit 8Ch 133ksps 5.25V Precision ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX186DCWP-T | 功能描述:模数转换器 - ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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