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| 型号： | MAX1880EUG+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 30/39页 |
| 文件大小： | 0K |
| 描述： | IC DC-DC CONV QUAD LCD 24TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 转换器，TFT，LCD |
| 输入电压： | 2.7 V ~ 5.5 V |
| 输出数： | 4 |
| 输出电压： | 2.7 V ~ 13 V |
| 工作温度： | 0°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
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MAX1778/MAX1880–MAX1885
Quad-Output TFT LCD DC/DC
Converters with Buffer
Capacitor Selection and Regulator Stability
Capacitors are required at the input and output of the
MAX1778/MAX1881/MAX1883/MAX1884 for stable
operation over the full temperature range and with load
For stable operation, place a capacitor (C LDOOUT ) and
a minimum load resistor (R5) at the output of the inter-
nal linear regulator (the base of the external transistor)
to set the dominant pole:
C LDOOUT ≥ 0 . 5 ms ?
x ? LDO
+
β MIN
?
currents up to 40mA. Connect a 1μF input bypass
capacitor (C SUPL ) between SUPL and ground to lower
the source impedance of the input supply. Connect a
ceramic capacitor between LDOOUT and ground,
using the following equation to determine the lowest
value required for stable operation:
? V + 0 . 7 V
? R 5
?
?
1 ?
V LDO ? ?
I LOAD ( MAX ) ?
?
C LDOOUT ≥ 0 . 5 ms X ?
?
?
? I LDOOUT ( MAX )
? V LDOOUT
?
?
?
Since the LDO cannot sink current, a minimum pull-
down resistor (R5) is required at the base of the npn
transistor to sink leakage currents and improve the
For example, with a 5V linear regulator output voltage
and a maximum 40mA load, use at least 4μF of output
capacitance. Applications that experience high-current
load pulses may require more output capacitance.
The ESR of the linear regulator ’s output capacitor
(C LDOOUT ) affects stability and output noise. Use output
capacitors with an ESR of 0.1 ? or less to ensure stability
and optimum transient response. Surface-mount ceram-
ic capacitors are good for this purpose. Place C SUPL
and C LDOOUT as close as possible to the linear regula-
tor to minimize the impact of PCB trace inductance.
External Pass Transistor
For applications where the linear regulator currents
high-to-low load-transient response. Under no-load
conditions, leakage currents from the internal pass
transistor supply the output capacitor (C LDOOUT ), even
when the transistor is off. As the leakage currents
increase over temperature, charge can build up on
C LDOOUT , making the linear regulator ’s output rise
above its set point. Therefore, R5 must sink at least
100μA to guarantee proper regulation. Additionally, the
minimum load current provided by R5 improves the
high-to-low load transients by lowering the impedance
seen by C LDOOUT after the transient occurs. Therefore,
if large load transients are expected, select R5 so that
the minimum load current is 10% of the transistor ’s
maximum base current:
? ( V + 0 . 7 V ) β MIN
? ?
exceed 40mA or where the power dissipation in the IC
needs to be reduced, an external npn transistor can be
used. In this case, the internal LDO only provides the
necessary base drive while the external npn transistor
R 5 =
V LDO + 0 . 7 V
I LDOOUT ( MIN )
= 0 . 1
? LDO
I LOAD ( MAX )
supports the load, so most of the power dissipation occurs
across the external transistor’s collector and emitter.
Selection of the external npn transistor is based on
three factors: the package’s power dissipation, the cur-
rent gain ( β ), and the collector-to-emitter saturation volt-
age (V CE(SAT) ). First, the maximum power dissipation
should not exceed the transistor’s package rating:
P = ( V COLLECTOR ? V LDO ) x I LOAD ( MAX )
Alternatively, output capacitance placed on the external
linear regulator’s output (the emitter) adds a second pole
that could destabilize the regulator. A capacitive-divider
from the transistor’s base to the feedback input (C2 and
C3, Figure 7) circumvents this second pole by adding a
pole-zero pair. Furthermore, to minimize excessive over-
shoot, the capacitive-divider’s ratio must be the same as
the resistive-divider’s ratio. Once the output capacitor is
selected, using the following equations to determine the
required capacitive-divider values:
=
? 1 +
?
=
Once the appropriate package type is selected,
consider the npn transistor’s current gain. Since the
internal LDO cannot source more than 40mA (min), the
transistor’s current gain must be high enough at the
lowest collector-to-emitter voltage to support the
maximum output load:
C 2 + C 3 ≥
C 2
C 2 + C 3
C LDO ?
100 ?
R 4
R 3 + R 4
R 4 ?
R 3 ?
V REF
V LDO
30
β MIN ≥
I LOAD(MAX ) - 40mA
40 mA
Maxim Integrated
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1881EUG | 功能描述:直流/直流开关转换器 RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1881EUG+ | 功能描述:直流/直流开关转换器 Quad-Output TFT LCD RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1881EUG+T | 功能描述:直流/直流开关转换器 Quad-Output TFT LCD RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1881EUG-T | 功能描述:直流/直流开关转换器 RoHS:否 制造商:STMicroelectronics 最大输入电压:4.5 V 开关频率:1.5 MHz 输出电压:4.6 V 输出电流:250 mA 输出端数量:2 最大工作温度:+ 85 C 安装风格:SMD/SMT |
| MAX1882EUG | 功能描述:LCD 驱动器 Quad-Output TFT LCD DC-DC Converter with Buffer RoHS:否 制造商:Maxim Integrated 数位数量:4.5 片段数量:30 最大时钟频率:19 KHz 工作电源电压:3 V to 3.6 V 最大工作温度:+ 85 C 最小工作温度:- 20 C 封装 / 箱体:PDIP-40 封装:Tube |
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