参数资料
型号: MAX1945REUI+T
厂商: Maxim Integrated Products
文件页数: 15/19页
文件大小: 0K
描述: IC REG BUCK 6A 28TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 降压(降压)
输出类型: 两者兼有
输出数: 1
输出电压: 1.8V,2.5V,可调
输入电压: 2.6 V ~ 5.5 V
PWM 型: 电流模式
频率 - 开关: 400kHz ~ 1.2MHz
电流 - 输出: 6A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 28-TSSOP 裸露焊盘
1MHz, 1% Accurate, 6A Internal Switch
Step-Down Regulators
Set the error-amplifier compensation zero formed by R C
and C C equal to the load-impedance pole frequency,
f PLOAD , at maximum load. Calculate C C as:
C C = (C OUT ? R OUT )/R C
500kHz Switching
The following design example is for the application cir-
cuit shown in Figures 1 and 2:
V OUT = 1.8V
I OUT(MAX) = 6A
C OUT = 180μF
R ESR = 0.04 ?
gm EA = 50μs
gmc = 18.2s
f SWITCH = 500kHz
R OUT = V OUT /I OUT(MAX) = 1.8V/6 A = 0.3 ?
fp DC = 1/(2 π ? C OUT ? (R OUT + R ESR ) = 1/(2 π ? 180 ?
10 -6 ? (0.3 + 0.04) = 2.6kHz.
fz ESR = 1/(2 π ? C OUT R ESR ) = 1/(2 π ? 180 ? 10 -6 ?
0.04) = 22.1kHz.
Pick the closed-loop unity-gain crossover frequency (f c )
at 60kHz. Determine the switching regulator DC gain:
G DC = gmc ? R OUT = 18.2 ? 0.3 = 5.46
then:
R C = (V OUT ? f C )/(gm EA ? V FB ? G DC ? fp LOAD ) =
(1.8 ? 60kHz)/(50 ? 10 -6 ? 0.8 ? 5.46 ? 2.6kHz) ≈ 190k ?
(1%), choose R C = 180k ? , 1%
C C = (C OUT ? (R OUT + R ESR ))/R C = (180uF ? (0.3 +
0.04))/180k ? ≈ 340pF, choose C C = 330pF, 10%
Table 2 shows the recommended values for R C and C C
for different output voltages.
1MHz Switching
Following procedure outlines the compensation
process of the MAX1945 for 1MHz operation with all
ceramic output capacitors (Figure 3). The basic regula-
tor loop consists of a power modulator, an output-feed-
back divider, and an error amplifier. The switching
regulator has a DC gain set by gmc ? R OUT , where
gmc is the transconductance from the output voltage of
the error amplifier to the output inductor current. The
load impedance of the switching modulator consists of
a pole-zero pair set by R OUT , the output capacitor
(C OUT ), and its ESR. The following equations define the
power train of the switching regulator:
Regulator DC Gain:
G DC = ? V OUT / ? V COMP = gmc ? R OUT
Load-Impedance Pole Frequency:
fp LOAD = 1/(2 ? π ? C OUT ? (R OUT +R ESR ))
Load-Impedance Zero Frequency:
fz ESR = 1/(2 ? π ? C OUT ? R ESR )
where, R OUT = V OUT /I OUT(MAX) , and gmc = 18.2. The
feedback divider has a gain of G FB = V FB /V OUT , where
V FB is equal to 0.8V. The transconductance error ampli-
fier has a DC gain, G EA(DC) , of 70dB. The compensa-
tion capacitor, C C , and the output resistance of the
error amplifier, R OEA (20M ? ), set the dominant pole.
C C and R C set a compensation zero. Calculate the
dominant pole frequency as:
fp EA = 1/(2 π ? C C ? R OEA )
Determine the compensation zero frequency as:
fz EA = 1/(2 π ? C C ? R C )
For best stability and response performance, set the
closed-loop unity-gain frequency much higher than the
load impedance pole frequency. In addition, set the
closed-loop unity-gain crossover frequency less than
one-fifth of the switching frequency. However, the maxi-
Table 2. Compensation Values for Output Voltages (500kHz)
VOUT (V)
R C
C C
0.8
110k ?
330pF
1.2
147k ?
330pF
1.8
180k ?
330pF
2.5
287k ?
220pF
3.3
365k ?
220pF
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15
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