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参数资料
| 型号： | MAX1951ESA+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 10/15页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 2A 8SOIC |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 5.5 V |
| 输入电压： | 2.6 V ~ 5.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 8-SOIC |
1MHz, All-Ceramic, 2.6V to 5.5V Input,
2A PWM Step-Down DC-to-DC Regulators
Typical Operating Characteristic s), the controller
responds by regulating the output voltage back to its
nominal state. The controller response time depends on
the closed-loop bandwidth. A higher bandwidth yields
a faster response time, thus preventing the output from
deviating further from its regulating value.
Compensation Design
The double pole formed by the inductor and output
capacitor of most voltage-mode controllers introduces a
large phase shift, that requires an elaborate compensa-
tion network to stabilize the control loop. The MAX1951/
MAX1952 utilize a current-mode control scheme that reg-
ulates the output voltage by forcing the required current
through the external inductor, eliminating the double pole
caused by the inductor and output capacitor, and greatly
simplifying the compensation network. A simple type 1
compensation with single compensation resistor (R 1 ) and
compensation capacitor (C 2 ) creates a stable and high-
bandwidth loop.
An internal transconductance error amplifier compen-
sates the control loop. Connect a series resistor and
capacitor between COMP (the output of the error ampli-
fier) and GND to form a pole-zero pair. The external
inductor, internal current-sensing circuitry, output
capacitor, and the external compensation circuit deter-
mine the loop system stability. Choose the inductor and
output capacitor based on performance, size, and cost.
Additionally, select the compensation resistor and
capacitor to optimize control-loop stability. The compo-
nent values shown in the typical application circuit
(Figure 2) yield stable operation over a broad range of
input-to-output voltages.
The basic regulator loop consists of a power modulator,
an output feedback divider, and an error amplifier. The
power modulator has DC gain set by gmc x R LOAD ,
with a pole-zero pair set by R LOAD , the output capaci-
tor (C OUT ), and its ESR. The following equations define
the power modulator:
pole. C 2 and R 1 set a compensation zero. Calculate the
dominant pole frequency as:
fp EA = 1/(2 π x C C x R OEA )
Determine the compensation zero frequency is:
fz EA = 1/(2 π x C C x R C )
For best stability and response performance, set the
closed-loop unity-gain frequency much higher than the
modulator pole frequency. In addition, set the closed-
loop crossover unity-gain frequency less than, or equal
to, 1/5 of the switching frequency. However, set the
maximum zero crossing frequency to less than 1/3 of
the zero frequency set by the output capacitance and
its ESR when using POSCAP, SPCAP, OSCON, or other
electrolytic capacitors.The loop-gain equation at the
unity-gain frequency is:
G EA(fc) x G MOD(fc) x V FB /V OUT = 1
where G EA(fc ) = gm EA x R 1 , and G MOD(fc) = gmc x
R LOAD x fp MOD /f C, where gm EA = 60μS .
R 1 calculated as:
R 1 = V OUT x K/(gm EA x V FB x G MOD(fc) )
where K is the correction factor due to the extra phase
introduced by the current loop at high frequencies
(>100kHz). K is related to the value of the output
capacitance (see Table 1 for values of K vs. C). Set the
error-amplifier compensation zero formed by R 1 and C 2
at the modulator pole frequency at maximum load. C 2
is calculated as follows:
C 2 = (V OUT x C OUT /(R 1 x I OUT(MAX) )
As the load current decreases, the modulator pole also
decreases; however, the modulator gain increases
accordingly, resulting in a constant closed-loop unity-
gain frequency. Use the following numerical example to
calculate R 1 and C 2 values of the typical application
circuit of Figure 2a.
Table 1. K Value
Values are for output inductance from 1.2μH
Modulator gain:
G MOD = Δ V OUT / Δ V COMP = gmc x R LOAD
Modulator pole frequency:
fp MOD = 1 / (2 x π x C OUT x (R LOAD +ESR))
C OUT (μF)
10
22
DESCRIPTION
K
0.55 to 2.2μH. Do not use output inductors larger
0.47 than 2.2μH. Use f C = 200kHz to calculate R 1 .
Modulator zero frequency:
fz ESR = 1 /(2 x π x C OUT x ESR)
where, R LOAD = V OUT /I OUT(MAX) , and gmc = 4.2S.
The feedback divider has a gain of G FB = V FB / V OUT ,
where V FB is equal to 0.8V. The transconductance error
amplifier has a DC gain, G EA(DC), of 70dB. The com-
pensation capacitor, C 2, and the output resistance of
the error amplifier, R OEA (20M Ω ), set the dominant
V OUT = 1.5V
I OUT(MAX) = 1.5A
C OUT = 10μF
R ESR = 0.010 Ω
gm EA = 60μS
10
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MAX1951ESA-TG05 | 功能描述:直流/直流开关调节器 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| MAX1951EVKIT | 功能描述:直流/直流开关调节器 Evaluation Kit for the MAX1951 MAX1952 RoHS:否 制造商:International Rectifier 最大输入电压:21 V 开关频率:1.5 MHz 输出电压:0.5 V to 0.86 V 输出电流:4 A 输出端数量: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:PQFN 4 x 5 |
| MAX19526EVKIT+ | 制造商:Maxim Integrated Products 功能描述:ANALOG TO DIGITAL CONVERTER - Boxed Product (Development Kits) |
| MAX19526EXE+ | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) Analog to Digital Converters - IC ADC 12BIT 8CH 40MSPS 144CTBGA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| MAX19526EXE+T | 功能描述:模数转换器 - ADC Integrated Circuits (ICs) Analog to Digital Converters - IC ADC 12BIT 8CH 40MSPS 144CTBGA RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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