参数资料
型号: MAX1968EUI+T
厂商: Maxim Integrated Products
文件页数: 5/16页
文件大小: 0K
描述: IC DRVR POWER 28-TSSOP
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
应用: 热电冷却器
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 带卷 (TR)
Power Drivers for Peltier TEC Modules
ELECTRICAL CHARACTERISTICS (continued)
(V DD = PV DD 1 = PV DD 2 = SHDN = 5V, PGND1 = PGND2 = FREQ = GND, CTLI = MAXV = MAXIP = MAXIN = REF, C REF = 1μF,
C COMP = 0.01μF, L LX_ = 3.3μH, C CS = C OS2 = 1μF, I TEC < 3A RMS (MAX1968), I TEC < 6A RMS (MAX1969), T A = -40°C to +85°C ,
unless otherwise noted.) (Note 4)
PARAMETER
OS1, OS2, CS Input
Current
SHDN , FREQ Input
Current
SYMBOL
I OS1 ,
I OS2 , I CS
I SHDN ,
I FREQ
0 or V DD
0 or V DD
CONDITIONS
MIN
-100
-5
TYP
MAX
+100
+5
UNITS
μA
μA
SHDN , FREQ Input
Low Voltage
V IL
V DD = 3V to 5.5V
V DD x
0.25
SHDN , FREQ Input
High Voltage
V IH
V DD = 3V to 5.5V
V DD x
0.75
V
V MAXV = V REF x 0.67, V OS1 to V OS2 =
MAXV Threshold
Accuracy
± 4V, V DD = 5V
V MAXV = V REF x 0.33, V OS1 to V OS2 =
-2
+2
%
± 2V, V DD = 3V
MAXV, MAXIP, MAXIN
Input Bias Current
CTLI Gain Accuracy
CTLI Input Resistance
I MAXV-BIAS ,
I MAXI_-BIAS
A CTLI
R CTLI
V MAXV = V MAXI_ = 0.1V or 1.5V
V CTLI = 0.5V to 2.5V (Note 3)
1M Ω terminated at REF
-0.1
9.5
0.5
+0.1
10.5
2.0
μA
V/V
M Ω
Error-Amp
Transconductance
ITEC Accuracy
g m
V OS1 to V CS = +100mV or -100mV
50
-10
175
+10
μA/V
%
A CTLI =
Note 2: Includes power FET leakage.
Note 3: CTLI Gain is defined as:
(V CTLI ? V REF )
V OS 1 ? V CS
Note 4: Specifications to -40 ° C are guaranteed by design, not production tested.
_______________________________________________________________________________________
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