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参数资料
| 型号： | MAX1968EUI+T |
| 厂商： | Maxim Integrated Products |
| 文件页数： | 9/16页 |
| 文件大小： | 0K |
| 描述： | IC DRVR POWER 28-TSSOP |
| 产品培训模块： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 标准包装： | 2,500 |
| 应用： | 热电冷却器 |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 带卷 (TR) |
Power Drivers for Peltier TEC Modules
Pin Description
PIN
1
2
3
4
5, 7
6, 8, 10
9, 11
12
13
14
15
16
17
18, 20
19, 21, 23
22, 24
25
26
27
28
—
NAME
V DD
GND
CTLI
REF
PGND2
LX2
PV DD 2
FREQ
ITEC
OS2
OS1
CS
SHDN
PV DD 1
LX1
PGND1
COMP
MAXIN
MAXIP
MAXV
EP
FUNCTION
Analog Supply Voltage Input
Analog Ground
TEC Current Control Input. Sets differential current into the TEC. Center point is 1.50V (no TEC current).
The current is given by:
I TEC = (V OS1 - V CS ) / R SENSE = (V CTLI - 1.50) / (10 x R SENSE ). When (V CTLI - V REF ) > 0, V OS2 > V OS1 > V CS .
1.50V Reference Output. Bypass REF to GND with a 1μF ceramic capacitor.
Power Ground 2. Internal synchronous rectifier ground connections. Connect all PGND pins together at
power ground plane.
Inductor Connection. Connect all LX2 pins together. For MAX1969, connect LX1 and LX2 pins together.
Power 2 Inputs. Must be same voltage as V DD . Connect all PV DD 2 inputs together at the V DD power plane.
Switching Frequency Select. High = 1MHz, Low = 500kHz.
TEC Current Monitor Output. The ITEC output voltage is a function of the voltage across the TEC current-
sense resistor. V ITEC = 1.50V + (V OS1 - V CS ) x 8.
Output Sense 2. OS2 senses one side of the differential TEC voltage. OS2 is a sense point, not a power
output. For MAX1969, connect OS2 to GND.
Output Sense 1. OS1 senses one side of the differential TEC voltage. OS1 is a sense point, not a power
output.
Current-Sense Input. The current through the TEC is monitored between CS and OS1. The maximum TEC
current is given by 150mV / R SENSE and is bipolar.
Shutdown Control Input. Active-low shutdown control.
Power 1 Inputs. Must be same voltage as V DD . Connect all PV DD 1 inputs together at the V DD power plane.
Inductor Connection. Connect all LX1 pins together. For MAX1969, connect all LX1 and LX2 pins together.
Power Ground 1. Internal synchronous rectifier ground connections. Connect all PGND pins together at
power ground plane.
Current Control-Loop Compensation. For most designs connect a 0.01μF capacitor from COMP to GND.
Maximum Negative TEC Current. Connect MAXIN to REF to set default negative current limit
-150mV / R SENSE . For MAX1969, connect MAXIN to MAXIP.
Maximum Positive TEC Current. Connect MAXIP to REF to set default positive current limit +150mV / R SENSE .
(See the Setting Max Positive and Negative TEC Current section).
Maximum Bipolar TEC Voltage. Connect an external resistive-divider from REF to GND to set the maximum
voltage. The maximum TEC voltage is 4 x V MAXV .
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance.
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