参数资料
型号: MAX196BMYI
厂商: MAXIM INTEGRATED PRODUCTS INC
元件分类: 模拟信号调理
英文描述: Multirange, Single %V, 12-Bit DAS with 12-Bit Bus Interface
中文描述: SPECIALTY ANALOG CIRCUIT, CDIP28
封装: 0.600 INCH, SIDE BRAZED, CERAMIC, DIP-28
文件页数: 11/16页
文件大小: 165K
代理商: MAX196BMYI
Cloc k Modes
The MAX196/MAX198 operate with either an internal or
an external clock. Control bits (D6, D7) select either
internal or external clock mode. Once the desired clock
mode is selected, changing these bits to program
power-down will not affect the clock mode. In each
mode, internal or external acquisition can be used. At
power-up, external clock mode is selected.
Internal Clock Mode
Select internal clock mode to free the μP from the
burden of running the SAR conversion clock. To select
this mode, write the control byte with D7 = 0 and D6 =
1. A 100pF capacitor between the CLK pin and ground
sets this frequency to 1.56MHz nominal. Figure 7
shows a linear relationship between the internal clock
period and the value of the external capacitor used.
External Clock Mode
Select external clock mode by writing the control byte
with D7 = 0 and D6 = 0. Figure 8 shows CLK and WR
timing relationships in internal and external acquisition
modes, with an external clock. A 100kHz to 2.0MHz
external clock with 45% to 55% duty cycle is required for
proper operation. Operating at clock frequencies lower
than 100kHz will cause a voltage droop across the hold
capacitor, and subsequently degrade performance.
M
Multirange, S ingle +5V, 12-Bit DAS
with 12-Bit Bus Interfac e
______________________________________________________________________________________
11
t
CS
t
CSWS
t
WR
t
ACQI
t
CONV
t
DH
t
DS
t
INT1
t
D0
t
TR
t
CSHW
t
CSRS
t
CSRH
ACQMOD = "1"
CS
WR
D7–D0
INT
RD
DOUT
ACQMOD = "0"
DATA VALID
CBYTE
CBYTE
Figure 6. Conversion Timing Using External Acquisition Mode
2000
0
0
50
250
350
500
CLOCK PIN CAPACITANCE (pF)
I
100 150 200
300
1500
1000
Figure 7. Internal Clock Period vs. Clock Pin Capacitance
相关PDF资料
PDF描述
MAX198BMYI Multirange, Single %V, 12-Bit DAS with 12-Bit Bus Interface
MAX1961EEP 2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Margining
MAX1960 2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Margining
MAX1960EEP 2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Margining
MAX1961 2.35V to 5.5V, 0.5% Accurate, 1MHz PWM Step-Down Controllers with Voltage Margining
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