参数资料
型号: MAX256ASA+T
厂商: Maxim Integrated Products
文件页数: 7/14页
文件大小: 0K
描述: IC DRVR H-BRIDGE 8-SOIC
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 2,500
类型: 半桥
输入类型: 非反相
输出数: 2
导通状态电阻: 500 毫欧
电流 - 输出 / 通道: 600mA
电流 - 峰值输出: 1A
电源电压: 3 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm Width)裸露焊盘
供应商设备封装: 8-SOICN 裸露焊盘
包装: 带卷 (TR)
3W Primary-Side Transformer H-Bridge Driver
for Isolated Supplies
Table 1. Oscillator Modes
OSCILLATOR
MODE
Internal
Programmable
Frequency
External Clock
CK_RS
Unconnected or pulled to ground by R S . R S must
be greater than 10k ? .
Digital input. Drive CK_RS with an external clock
signal.
MODE
V CC
Ground
OPERATION
100kHz to 1MHz (typ).
Leave CK_RS unconnected for minimum
switching frequency.
CK_RS is pulled to ground by an internal
165k ? resistor. The device switches at one
half the external clock frequency.
Connected to V CC or GND
(external clock mode)
The device is disabled after a maximum of
Disable
Unconnected or pulled to ground with R S
(internal clock mode)
Applications Information
Ground
55μs following the last rising edge on
CK_RS.
1:N CT
Available Output Power
With a supply voltage of +5V over the extended -40°C to
+85°C temperature range, the MAX256 is specified to
provide up to 3W of power to the primary side of a trans-
former in an isolated power supply. The device provides
up to 2.5W of power to the primary winding over the
+85°C to +125°C temperature range. The output power
is specified at ST1 and ST2 since losses in the trans-
former and rectification network are dependent upon
component selection and topology. The power dissipa-
tion of the MAX256 is approximated by:
P D = R OHL × I PRI 2
where R OHL is the total high-side and low-side on-resis-
tance of the internal FET drivers, and I PRI is the load
current flowing through the transformer primary between
ST1 and ST2. For low output load currents, include the
contribution to P D from the quiescent supply current:
I CC x V CC .
PC Board Layout Guidelines
As with all power-supply circuits, careful PC board lay-
out is important to achieve low switching losses and sta-
ble operation. For thermal performance, connect the
exposed paddle to a solid copper ground plane.
The traces from ST1 and ST2 to the transformer must be
low-resistance and inductance paths. Place the trans-
+
V IN
-
+
V IN
-
+
V IN
-
1:N
1:N
+
V OUT = N / 2 * V IN - V D
-
V D = DIODE FORWARD VOLTAGE
FIGURE 1A. PUSH-PULL RECTIFICATION
+
V OUT = 2(NV IN - V D )
-
FIGURE 1B. VOLTAGE DOUBLER
+
V OUT = NV IN - 2V D
-
FIGURE 1C. FULL-WAVE RECTIFIER
former as close as possible to the MAX256 using short,
wide traces.
When the device is operating with the internal oscillator,
it is possible for high-frequency switching components
on ST1 and ST2 to couple into the CK_RS circuitry
Figure 1. Secondary-Side Rectification Topologies
through PC board parasitic capacitance. This capacitive
coupling can induce duty-cycle errors in the oscillator,
resulting in a DC current through the transformer. To
ensure proper operation, shield the CK_RS circuitry
_______________________________________________________________________________________
7
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